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Implement dec instruction
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lyrakisk committed Sep 14, 2024
1 parent d9db21e commit 62d0d2d
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Showing 2 changed files with 29 additions and 5 deletions.
4 changes: 4 additions & 0 deletions src/cpu/instructions.rs
Original file line number Diff line number Diff line change
Expand Up @@ -85,6 +85,10 @@ pub static INSTRUCTIONS: Lazy<HashMap<u8, Instruction>> = Lazy::new(|| {
Instruction {opcode: 0xE0, name: "CPX", bytes: 2, addressing_mode: AddressingMode::Immediate},
Instruction {opcode: 0xE4, name: "CPX", bytes: 2, addressing_mode: AddressingMode::ZeroPage},
Instruction {opcode: 0xEC, name: "CPX", bytes: 3, addressing_mode: AddressingMode::Absolute},
Instruction {opcode: 0xC6, name: "DEC", bytes: 2, addressing_mode: AddressingMode::ZeroPage},
Instruction {opcode: 0xD6, name: "DEC", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X},
Instruction {opcode: 0xCE, name: "DEC", bytes: 3, addressing_mode: AddressingMode::Absolute},
Instruction {opcode: 0xDE, name: "DEC", bytes: 3, addressing_mode: AddressingMode::Absolute_X},
Instruction {opcode: 0xA9, name: "LDA", bytes: 2, addressing_mode: AddressingMode::Immediate},
Instruction {opcode: 0xA5, name: "LDA", bytes: 2, addressing_mode: AddressingMode::ZeroPage},
Instruction {opcode: 0xB5, name: "LDA", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X},
Expand Down
30 changes: 25 additions & 5 deletions src/cpu/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -162,6 +162,10 @@ impl CPU {
self.cpx(&instruction.addressing_mode);
Ok(())
}
"DEC" => {
self.dec(&instruction.addressing_mode);
Ok(())
}
"BRK" => Err(InstructionExecutionError::INTERRUPT_HANDLING_NOT_IMPLEMENTED),
"LDA" => {
self.lda(&instruction.addressing_mode);
Expand Down Expand Up @@ -521,6 +525,14 @@ impl CPU {
self.update_negative_flag(result);
}

fn dec(&mut self, addressing_mode: &AddressingMode) {
let address = self.get_operand_address(addressing_mode);
let result = self.mem_read(address).wrapping_sub(1);
self.mem_write(address, result);
self.update_zero_flag(result);
self.update_negative_flag(result);
}

fn lda(&mut self, addressing_mode: &AddressingMode) {
let operand = self.get_operand(addressing_mode);
self.register_a = operand;
Expand Down Expand Up @@ -580,16 +592,16 @@ impl CPU {
self.update_negative_flag(self.register_a);
}

fn update_zero_flag(&mut self, register: u8) {
if register == 0 {
fn update_zero_flag(&mut self, data: u8) {
if data == 0 {
self.set_flag(STATUS_FLAG_MASK_ZERO);
} else {
self.clear_flag(STATUS_FLAG_MASK_ZERO);
}
}

fn update_negative_flag(&mut self, register_value: u8) {
if register_value & 0b1000_0000 != 0 {
fn update_negative_flag(&mut self, data: u8) {
if data & 0b1000_0000 != 0 {
self.set_flag(STATUS_FLAG_MASK_NEGATIVE);
} else {
self.clear_flag(STATUS_FLAG_MASK_NEGATIVE);
Expand Down Expand Up @@ -1137,7 +1149,11 @@ mod test_cpu {
#[test_case("submodules/65x02/nes6502/v1/aa.json")]
#[test_case("submodules/65x02/nes6502/v1/a9.json")]
#[test_case("submodules/65x02/nes6502/v1/b5.json")]
#[test_case("submodules/65x02/nes6502/v1/c6.json")]
#[test_case("submodules/65x02/nes6502/v1/c9.json")]
#[test_case("submodules/65x02/nes6502/v1/ce.json")]
#[test_case("submodules/65x02/nes6502/v1/d6.json")]
#[test_case("submodules/65x02/nes6502/v1/de.json")]
#[test_case("submodules/65x02/nes6502/v1/e0.json")]
#[test_case("submodules/65x02/nes6502/v1/e4.json")]
#[test_case("submodules/65x02/nes6502/v1/ec.json")]
Expand All @@ -1163,7 +1179,11 @@ mod test_cpu {

cpu.execute_next_instruction();

assert_eq!(cpu.program_counter, final_cpu.program_counter);
assert_eq!(
cpu.program_counter, final_cpu.program_counter,
"Program counter values don't match\n expected: {}\n actual: {}",
final_cpu.program_counter, cpu.program_counter
);
assert_eq!(
cpu.register_a, final_cpu.register_a,
"Register a values don't match\n expected: {}\n actual: {}",
Expand Down

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