Enable testing HLSL 2021 short-circuit tests (#5509)

These tests were in the wrong location so they weren't getting run. Moving them to the filecheck location enables their testing Additionally adds an explicit HLSL 2018 parameter to the legacy behavior since HLSL 2021 has become the default now and revises the label CHECK lines so they work with all release compiler output followup to #3917
microsoft · Aug 8, 2023 · b47eec8 · b47eec8
1 parent 96e13a0
commit b47eec8
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Showing 3 changed files with 11 additions and 11 deletions.
diff --git a/...g/test/CodeGenHLSL/short-circuit-and.hlsl → ...ntrol_flow/if_else/short-circuit-and.hlsl b/...g/test/CodeGenHLSL/short-circuit-and.hlsl → ...ntrol_flow/if_else/short-circuit-and.hlsl
@@ -1,5 +1,5 @@
-// RUN: %dxc /T ps_6_0 %s -HV 2021 /Zi | FileCheck %s
-// RUN: %dxc /T ps_6_0 %s | FileCheck %s -check-prefix=NO_SHORT_CIRCUIT
+// RUN: %dxc /T ps_6_0 %s -HV 2021 -Zi | FileCheck %s
+// RUN: %dxc /T ps_6_0 %s -HV 2018 | FileCheck %s -check-prefix=NO_SHORT_CIRCUIT
 
 // Load the two uav handles
 // CHECK-DAG: %[[uav_foo:.+]] = call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 0, i32 128, i1 false)
@@ -14,7 +14,7 @@
 // CHECK: br i1 %[[foo_cmp]], label %[[true_label:.+]], label %[[false_label:.+]],
 
 // For AND, if first operand is TRUE, goes to evaluate the second operand
-// CHECK: [[true_label]]:
+// CHECK: [[true_label]]{{:? *}}; preds =
 
 // Second side effect
 // CHECK: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %[[uav_bar]]

diff --git a/...ng/test/CodeGenHLSL/short-circuit-or.hlsl → ...ontrol_flow/if_else/short-circuit-or.hlsl b/...ng/test/CodeGenHLSL/short-circuit-or.hlsl → ...ontrol_flow/if_else/short-circuit-or.hlsl
@@ -1,5 +1,5 @@
-// RUN: %dxc /T ps_6_0 %s -HV 2021 /Zi | FileCheck %s
-// RUN: %dxc /T ps_6_0 %s | FileCheck %s -check-prefix=NO_SHORT_CIRCUIT
+// RUN: %dxc /T ps_6_0 %s -HV 2021 -Zi | FileCheck %s
+// RUN: %dxc /T ps_6_0 %s -HV 2018 | FileCheck %s -check-prefix=NO_SHORT_CIRCUIT
 
 // Load the two uav handles
 // CHECK-DAG: %[[uav_foo:.+]] = call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 0, i32 128, i1 false)
@@ -14,7 +14,7 @@
 // CHECK: br i1 %[[foo_cmp]], label %[[true_label:.+]], label %[[false_label:.+]],
 
 // For OR, if first operand is FALSE, goes to evaluate the second operand
-// CHECK: [[false_label]]:
+// CHECK: [[false_label]]{{:? *}}; preds =
 
 // Second side effect
 // CHECK: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %[[uav_bar]]

diff --git a/...est/CodeGenHLSL/short-circuit-select.hlsl → ...ol_flow/if_else/short-circuit-select.hlsl b/...est/CodeGenHLSL/short-circuit-select.hlsl → ...ol_flow/if_else/short-circuit-select.hlsl
@@ -1,5 +1,5 @@
-// RUN: %dxc /T ps_6_0 %s -HV 2021 /Zi | FileCheck %s
-// RUN: %dxc /T ps_6_0 %s | FileCheck %s -check-prefix=NO_SHORT_CIRCUIT
+// RUN: %dxc /T ps_6_0 %s -HV 2021 -Zi | FileCheck %s
+// RUN: %dxc /T ps_6_0 %s -HV 2018 | FileCheck %s -check-prefix=NO_SHORT_CIRCUIT
 
 // Load the two uav handles
 // CHECK-DAG: %[[uav_foo:.+]] = call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 0, i32 128, i1 false)
@@ -12,19 +12,19 @@
 // The actual select
 // CHECK: br i1 %[[cond_cmp]], label %[[true_label:.+]], label %[[false_label:.+]],
 
-// CHECK: [[true_label]]:
+// CHECK: [[true_label]]{{:? *}}; preds =
 // First side effect
 // CHECK-DAG: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %[[uav_foo]]
 // CHECK-DAG: %[[sin:.+]] = call float @dx.op.unary.f32(i32 13
 // CHECK: br label %[[final_block:.+]],
 
-// CHECK: [[false_label]]:
+// CHECK: [[false_label]]{{:? *}}; preds =
 // Second side effect
 // CHECK-DAG: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %[[uav_bar]]
 // CHECK-DAG: %[[cos:.+]] = call float @dx.op.unary.f32(i32 12
 // CHECK: br label %[[final_block]],
 
-// CHECK: [[final_block]]:
+// CHECK: [[final_block]]{{:? *}}; preds =
 // CHECK: phi float [ %[[sin]], %[[true_label]] ],  [ %[[cos]], %[[false_label]] ]
 
 // Just check there's no branches.