Merge pull request #54 from mn416/explicit-vpm

Support explicit VPM and DMA

Examples/DMA.cpp

@@ -0,0 +1,51 @@
+#include "QPULib.h"
+
+using namespace QPULib;
+
+void dma(Ptr<Int> p)
+{
+  // Setup load of 16 vectors into VPM, starting at word address 0
+  dmaSetReadPitch(64);
+  dmaSetupRead(HORIZ, 16, 0);
+  // Start loading from memory at address 'p'
+  dmaStartRead(p);
+  // Wait until load complete
+  dmaWaitRead();
+
+  // Setup load of 16 vectors from VPM, starting at vector address 0
+  vpmSetupRead(HORIZ, 16, 0);
+  // Setup store to VPM, starting at vector address 16
+  vpmSetupWrite(HORIZ, 16);
+
+  // Read each vector, increment it, and write it back
+  for (int i = 0; i < 16; i++)
+    vpmPut(vpmGetInt() + 1);
+
+  // Setup store of 16 vectors into VPM, starting at word address 256
+  dmaSetupWrite(HORIZ, 16, 256);
+  // Start writing to memory at address 'p'
+  dmaStartWrite(p);
+  // Wait until store complete
+  dmaWaitWrite();
+}
+
+int main()
+{
+  // Construct kernel
+  auto k = compile(dma);
+
+  // Allocate and initialise array shared between ARM and GPU
+  SharedArray<int> array(256);
+  for (int i = 0; i < 256; i++)
+    array[i] = i;
+
+  // Invoke the kernel and display the result
+  k(&array);
+  for (int i = 0; i < 16; i++) {
+    for (int j = 0; j < 16; j++)
+      printf("%i ", array[16*i + j]);
+    printf("\n");
+  }
+
+  return 0;
+}

Examples/OET.cpp

@@ -6,11 +6,8 @@ using namespace QPULib;
 
 void oet(Ptr<Int> p)
 {
-  setReadStride(1);
-  setWriteStride(1);
-
   Int evens = *p;
-  Int odds  = *(p+1);
+  Int odds  = *(p+16);
 
   For (Int count = 0, count < 16, count++)
     Int evens2 = min(evens, odds);
@@ -31,8 +28,8 @@ void oet(Ptr<Int> p)
     odds  = odds2;
   End
 
-  *p     = evens;
-  *(p+1) = odds;
+  *p      = evens;
+  *(p+16) = odds;
 }
 
 int main()
@@ -48,7 +45,7 @@ int main()
   // Invoke the kernel and display the result
   k.call(&a);
   for (int i = 0; i < 32; i++)
-    printf("%i: %i\n", i, a[i]);
+    printf("%i: %i\n", i, (i & 1) ? a[16+(i>>1)] : a[i>>1]);
 
   return 0;
 }

Lib/Common/Queue.h

@@ -0,0 +1,21 @@
+#ifndef _QUEUE_H_
+#define _QUEUE_H_
+
+namespace QPULib {
+
+  // Very simple queue containing N elements of type T
+  template <int N, typename T> struct Queue {
+    T elems[N+1];
+    int front;
+    int back;
+    Queue() { front = back = 0; }
+    bool isEmpty() { return front == back; }
+    bool isFull() { return ((back+1)%(N+1)) == front; }
+    void enq(T elem) { elems[back] = elem; back = (back+1)%(N+1); }
+    T* first() { return &elems[front]; }
+    void deq() { front = (front+1)%(N+1); }
+  };
+
+}
+
+#endif

Lib/Kernel.cpp

@@ -9,6 +9,7 @@
 #include "Target/Satisfy.h"
 #include "Target/LoadStore.h"
 #include "Target/Encode.h"
+#include "Target/Pretty.h"
 
 namespace QPULib {
 

Lib/Kernel.h

@@ -195,7 +195,7 @@ template <typename... ts> struct Kernel {
     resetFreshLabelGen();
 
     // Reserved general-purpose variables
-    Int qpuId, qpuCount, readStride, writeStride;
+    Int qpuId, qpuCount;
     qpuId = getUniformInt();
     qpuCount = getUniformInt();
 

Lib/Source/Float.cpp

@@ -89,6 +89,15 @@ FloatExpr getUniformFloat()
   return mkFloatExpr(e);
 }
 
+// Read vector from VPM
+FloatExpr vpmGetFloat()
+{
+  Expr* e    = mkExpr();
+  e->tag     = VAR;
+  e->var.tag = VPM_READ;
+  return mkFloatExpr(e);
+}
+
 // Add
 FloatExpr operator+(FloatExpr a, FloatExpr b)
   { return mkFloatApply(a, mkOp(ADD, FLOAT), b); }

Lib/Source/Float.h

@@ -52,6 +52,7 @@ struct Float {
 // ============================================================================
 
 FloatExpr getUniformFloat();
+FloatExpr vpmGetFloat();
 
 FloatExpr operator+(FloatExpr a, FloatExpr b);
 FloatExpr operator-(FloatExpr a, FloatExpr b);

Lib/Source/Int.cpp

@@ -122,6 +122,15 @@ IntExpr numQPUs()
   return mkIntExpr(e);
 }
 
+// Read vector from VPM
+IntExpr vpmGetInt()
+{
+  Expr* e    = mkExpr();
+  e->tag     = VAR;
+  e->var.tag = VPM_READ;
+  return mkIntExpr(e);
+}
+
 // Vector rotation
 IntExpr rotate(IntExpr a, IntExpr b)
   { return mkIntApply(a, mkOp(ROTATE, INT32), b); }

Lib/Source/Int.h

@@ -59,6 +59,7 @@ IntExpr getUniformInt();
 IntExpr index();
 IntExpr me();
 IntExpr numQPUs();
+IntExpr vpmGetInt();
 
 IntExpr rotate(IntExpr a, IntExpr b);
 FloatExpr rotate(FloatExpr a, IntExpr b);

Lib/Source/Interpreter.cpp

@@ -46,6 +46,11 @@ Vec evalVar(CoreState* s, Var v)
       return x;
     }
 
+    // VPM read
+    case VPM_READ:
+      printf("QPULib: vpmGet() not supported by interpreter\n");
+      break;
+
     default:
       printf("QPULib: reading from write-only variable\n");
   }
@@ -145,7 +150,7 @@ Vec eval(CoreState* s, Expr* e)
       Vec v;
       for (int i = 0; i < NUM_LANES; i++) {
         v.elems[i].intVal = emuHeap[hp>>2];
-        hp += 4*(s->readStride+1);
+        hp += s->readStride;
       }
       return v;
   }
@@ -291,6 +296,11 @@ void assignToVar(CoreState* s, Vec cond, Var v, Vec x)
       return;
     }
 
+    // VPM write
+    case VPM_WRITE:
+      printf("QPULib: vpmPut() not supported by interpreter\n");
+      break;
+
     // Others are read-only
     case UNIFORM:
     case QPU_NUM:
@@ -322,7 +332,7 @@ void execAssign(CoreState* s, Vec cond, Expr* lhs, Expr* rhs)
       int hp = index.elems[0].intVal;
       for (int i = 0; i < NUM_LANES; i++) {
         emuHeap[hp>>2] = val.elems[i].intVal;
-        hp += 4*(s->writeStride+1);
+        hp += 4 + s->writeStride;
       }
       return;
     }
@@ -464,7 +474,7 @@ void execStoreRequest(CoreState* s, Expr* data, Expr* addr) {
   int hp = index.elems[0].intVal;
   for (int i = 0; i < NUM_LANES; i++) {
     emuHeap[hp>>2] = val.elems[i].intVal;
-    hp += 4*(s->writeStride+1);
+    hp += 4 + s->writeStride;
   }
 }
 
@@ -565,8 +575,19 @@ void exec(InterpreterState* state, CoreState* s)
       else state->sema[stmt->semaId]--;
       return;
 
-    // Flush outstanding stores
-    case FLUSH: return;
+    case DMA_READ_WAIT:
+    case DMA_WRITE_WAIT:
+    case SETUP_VPM_READ:
+    case SETUP_VPM_WRITE:
+    case SETUP_DMA_READ:
+    case SETUP_DMA_WRITE:
+      // Interpreter ignores these
+      return;
+
+    case DMA_START_READ:
+    case DMA_START_WRITE:
+      printf("QPULib: DMA access not supported by interpreter\n");
+      break;
   }
 
   // Unreachable

Lib/Source/Pretty.cpp

@@ -79,6 +79,10 @@ void pretty(FILE *f, Expr* e)
         fprintf(f, "QPU_NUM");
       else if (e->var.tag == ELEM_NUM)
         fprintf(f, "ELEM_NUM");
+      else if (e->var.tag == VPM_READ)
+        fprintf(f, "VPM_READ");
+      else if (e->var.tag == VPM_WRITE)
+        fprintf(f, "VPM_WRITE");
       else if (e->var.tag == TMU0_ADDR)
         fprintf(f, "TMU0_ADDR");
       break;
@@ -264,15 +268,15 @@ void pretty(FILE *f, int indent, Stmt* s)
     // Set read stride
     case SET_READ_STRIDE:
       indentBy(f, indent);
-      fprintf(f, "setReadStride(");
+      fprintf(f, "dmaSetReadPitch(");
       pretty(f, s->stride);
       fprintf(f, ")\n");
       break;
 
     // Set write stride
     case SET_WRITE_STRIDE:
       indentBy(f, indent);
-      fprintf(f, "setWriteStride(");
+      fprintf(f, "dmaSetWriteStride(");
       pretty(f, s->stride);
       fprintf(f, ")\n");
       break;
@@ -295,12 +299,6 @@ void pretty(FILE *f, int indent, Stmt* s)
       fprintf(f, ")\n");
       break;
 
-    // Flush outstanding stores
-    case FLUSH:
-      indentBy(f, indent);
-      fprintf(f, "flush()\n");
-      break;
-
     // Increment semaphore
     case SEMA_INC:
       indentBy(f, indent);
@@ -319,6 +317,78 @@ void pretty(FILE *f, int indent, Stmt* s)
       fprintf(f, "hostIRQ()\n");
       break;
 
+    // Setup VPM Read
+    case SETUP_VPM_READ:
+      indentBy(f, indent);
+      fprintf(f, "vpmSetupRead(");
+      fprintf(f, "numVecs=%i, ", s->setupVPMRead.numVecs);
+      fprintf(f, "dir=%s,", s->setupVPMRead.hor ? "HOR" : "VIR");
+      fprintf(f, "stride=%i,", s->setupVPMRead.stride);
+      pretty(f, s->setupVPMRead.addr);
+      fprintf(f, ");\n");
+      break;
+
+    // Setup VPM Write
+    case SETUP_VPM_WRITE:
+      indentBy(f, indent);
+      fprintf(f, "vpmSetupWrite(");
+      fprintf(f, "dir=%s,", s->setupVPMWrite.hor ? "HOR" : "VIR");
+      fprintf(f, "stride=%i,", s->setupVPMWrite.stride);
+      pretty(f, s->setupVPMWrite.addr);
+      fprintf(f, ");\n");
+      break;
+
+    // DMA read wait
+    case DMA_READ_WAIT:
+      indentBy(f, indent);
+      fprintf(f, "dmaReadWait();\n");
+      break;
+
+    // DMA write wait
+    case DMA_WRITE_WAIT:
+      indentBy(f, indent);
+      fprintf(f, "dmaWriteWait();\n");
+      break;
+
+    // DMA start read
+    case DMA_START_READ:
+      indentBy(f, indent);
+      fprintf(f, "dmaStartRead(");
+      pretty(f, s->startDMARead);
+      fprintf(f, ");\n");
+      break;
+
+    // DMA start write
+    case DMA_START_WRITE:
+      indentBy(f, indent);
+      fprintf(f, "dmaStartWrite(");
+      pretty(f, s->startDMAWrite);
+      fprintf(f, ");\n");
+      break;
+
+    // DMA read setup
+    case SETUP_DMA_READ:
+      indentBy(f, indent);
+      fprintf(f, "dmaSetupRead(");
+      fprintf(f, "numRows=%i,", s->setupDMARead.numRows);
+      fprintf(f, "rowLen=%i,", s->setupDMARead.rowLen);
+      fprintf(f, "dir=%s,", s->setupDMARead.hor ? "HORIZ" : "VERT");
+      fprintf(f, "vpitch=%i,", s->setupDMARead.vpitch);
+      pretty(f, s->setupDMARead.vpmAddr);
+      fprintf(f, ");\n");
+      break;
+
+    // DMA write setup
+    case SETUP_DMA_WRITE:
+      indentBy(f, indent);
+      fprintf(f, "dmaSetupWrite(");
+      fprintf(f, "numRows=%i,", s->setupDMAWrite.numRows);
+      fprintf(f, "rowLen=%i,", s->setupDMAWrite.rowLen);
+      fprintf(f, "dir=%s,", s->setupDMAWrite.hor ? "HORIZ" : "VERT");
+      pretty(f, s->setupDMAWrite.vpmAddr);
+      fprintf(f, ");\n");
+      break;
+
     // Not reachable
     default:
       assert(false);