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Co-authored-by: ZHANG Yuntian <[email protected]>
nascs · Oct 25, 2024 · 812b0d1 · 812b0d1
1 parent 956b38a
commit 812b0d1
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Showing 2 changed files with 6 additions and 5 deletions.
diff --git a/arch/arm64/boot/dts/rockchip/overlays/Makefile b/arch/arm64/boot/dts/rockchip/overlays/Makefile
@@ -136,7 +136,7 @@ dtb-$(CONFIG_CLK_RK3528) += \
 	rk3528-spi0-cs1-enc28j60.dtbo \
 	rk3528-spi0-cs1-mcp2515.dtbo \
 	rk3528-spi0-cs1-spidev.dtbo \
-	rk3528-spi1-cs-gpio.dtbo \
+	rk3528-spi1-cs-gpio-spidev.dtbo \
 	rk3528-uart0-m0.dtbo \
 	rk3528-uart1-m0.dtbo \
 	rk3528-uart2-m1.dtbo \

diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi1-cs-gpio.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi1-cs-gpio.dts
@@ -5,11 +5,12 @@
 
 / {
 	metadata {
-		title = "Enable spidev on SPI1 over PIN_26";
+		title = "Enable spidev on SPI1";
 		compatible = "radxa,rock-2a", "radxa,rock-2f", "radxa,medge-rk3528a-io";
 		category = "misc";
 		exclusive = "GPIO1_B6", "GPIO1_B7", "GPIO1_C0", "GPIO4_C1";
-		description = "Enable spidev on SPI1 over PIN_26.";
+		description = "Enable spidev on SPI1.
+CS pin is located on pin 26.";
 	};
 };
 
@@ -19,8 +20,8 @@
 	#size-cells = <0>;
 	max-freq = <50000000>;
 	num-cs = <1>;
-    cs-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_LOW>;
-    pinctrl-0 = <&spi1_pins>;
+	cs-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_LOW>;
+	pinctrl-0 = <&spi1_pins>;
 
 	spidev@0 {
 		compatible = "rockchip,spidev";