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[Codegen][GPU] Add kernel config for LLVMGPUTileAndFuse for targeting…
… mma (iree-org#18105) This patch adds kernel configuration logic for contraction like operations to use mma instructions with the LLVMGPUTileAndFusePipeline. This directly leverages the configuration logic already present and in use for existing matmul based pipelines, instead generating a config for TileAndFuse.
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111 changes: 111 additions & 0 deletions
111
compiler/src/iree/compiler/Codegen/Dialect/GPU/IR/DerivedConfigUtils.cpp
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| Original file line number | Diff line number | Diff line change |
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| // Copyright 2024 The IREE Authors | ||
| // | ||
| // Licensed under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
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| #include "iree/compiler/Codegen/Dialect/GPU/IR/DerivedConfigUtils.h" | ||
| #include <numeric> | ||
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| #include "iree/compiler/Codegen/Dialect/Codegen/IR/IREECodegenAttrs.h" | ||
| #include "iree/compiler/Dialect/LinalgExt/IR/LinalgExtOps.h" | ||
| #include "mlir/Dialect/Linalg/IR/LinalgInterfaces.h" | ||
| #include "mlir/IR/BuiltinAttributes.h" | ||
| #include "mlir/IR/TypeUtilities.h" | ||
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| namespace mlir::iree_compiler::IREE::GPU { | ||
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| static constexpr int64_t kPreferredCopyNumBits = 128; | ||
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| SmallVector<int64_t> | ||
| getThreadTileSizesFromLoopRanges(SmallVector<int64_t> loopRanges, | ||
| int64_t numThreads, int64_t vectorSize) { | ||
| // TODO: We shouldn't need this check, however loop fusion currently requires | ||
| // loop trip counts to be identical, meaning we need to use a num_threads | ||
| // variant of tiling. Remove this and simply return the preferred vector size | ||
| // once loop fusion can resolve the forall properly. | ||
| if (llvm::any_of(loopRanges, | ||
| [](int64_t s) { return ShapedType::isDynamic(s); })) { | ||
| return {}; | ||
| } | ||
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| int64_t flatNumTrips = std::accumulate(loopRanges.begin(), loopRanges.end(), | ||
| 1, std::multiplies<int64_t>()); | ||
| if (flatNumTrips % numThreads != 0) { | ||
| return {}; | ||
| } | ||
| int64_t maxVectorSize = flatNumTrips / numThreads; | ||
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| while (maxVectorSize % vectorSize != 0) { | ||
| vectorSize /= 2; | ||
| } | ||
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| SmallVector<int64_t> tileSizes(loopRanges.size(), 0); | ||
| tileSizes.back() = vectorSize; | ||
| int64_t residualNumThreads = numThreads / (loopRanges.back() / vectorSize); | ||
| for (int i = tileSizes.size() - 2, e = 0; i >= e; --i) { | ||
| if (loopRanges[i] >= residualNumThreads) { | ||
| tileSizes[i] = loopRanges[i] / residualNumThreads; | ||
| residualNumThreads = 1; | ||
| break; | ||
| } | ||
| tileSizes[i] = 1; | ||
| residualNumThreads /= loopRanges[i]; | ||
| } | ||
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| return tileSizes; | ||
| } | ||
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| SmallVector<int64_t> deriveLinalgOpThreadTileSizes(linalg::LinalgOp linalgOp, | ||
| int64_t numThreads) { | ||
| if (!linalgOp.hasPureTensorSemantics()) { | ||
| return {}; | ||
| } | ||
| // TODO: Support multi-result | ||
| if (linalgOp->getNumResults() != 1) { | ||
| return {}; | ||
| } | ||
| SmallVector<int64_t> loopRanges = linalgOp.getStaticLoopRanges(); | ||
| int64_t vectorSize = kPreferredCopyNumBits / | ||
| getElementTypeOrSelf(linalgOp->getResultTypes()[0]) | ||
| .getIntOrFloatBitWidth(); | ||
| return getThreadTileSizesFromLoopRanges(loopRanges, numThreads, vectorSize); | ||
| } | ||
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| SmallVector<int64_t> | ||
| deriveIm2colOpThreadTileSizes(IREE::LinalgExt::Im2colOp im2colOp, | ||
| int64_t numThreads) { | ||
| if (!im2colOp.hasPureTensorSemantics()) { | ||
| return {}; | ||
| } | ||
| // TODO(Max191): Add `getStaticLoopRanges` to TilingInterface, and use it | ||
| // here instead of `im2colOp.getOutputType().getShape()`. Then we can also | ||
| // get rid of the specialization for Im2colOp vs LinalgOp and just use | ||
| // TilingInterface ops. | ||
| SmallVector<int64_t> loopRanges(im2colOp.getOutputType().getShape()); | ||
| int64_t vectorSize = kPreferredCopyNumBits / | ||
| getElementTypeOrSelf(im2colOp->getResultTypes()[0]) | ||
| .getIntOrFloatBitWidth(); | ||
| return getThreadTileSizesFromLoopRanges(loopRanges, numThreads, vectorSize); | ||
| } | ||
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| SmallVector<int64_t> deriveThreadTileSizes(Operation *op) { | ||
| std::optional<SmallVector<int64_t>> workgroupSize = | ||
| getWorkgroupSize(op->getParentOfType<FunctionOpInterface>()); | ||
| if (!workgroupSize) { | ||
| return {}; | ||
| } | ||
| int64_t numThreads = | ||
| std::accumulate(workgroupSize->begin(), workgroupSize->end(), 1, | ||
| std::multiplies<int64_t>()); | ||
| return TypeSwitch<Operation *, SmallVector<int64_t>>(op) | ||
| .Case([&](linalg::LinalgOp linalgOp) -> SmallVector<int64_t> { | ||
| return deriveLinalgOpThreadTileSizes(linalgOp, numThreads); | ||
| }) | ||
| .Case([&](IREE::LinalgExt::Im2colOp im2colOp) -> SmallVector<int64_t> { | ||
| return deriveIm2colOpThreadTileSizes(im2colOp, numThreads); | ||
| }) | ||
| .Default([](Operation *op) -> SmallVector<int64_t> { return {}; }); | ||
| } | ||
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| } // namespace mlir::iree_compiler::IREE::GPU |
18 changes: 18 additions & 0 deletions
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compiler/src/iree/compiler/Codegen/Dialect/GPU/IR/DerivedConfigUtils.h
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| @@ -0,0 +1,18 @@ | ||
| // Copyright 2024 The IREE Authors | ||
| // | ||
| // Licensed under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
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| #ifndef IREE_COMPILER_CODEGEN_DIALECT_GPU_IR_DERIVEDCONFIGUTILS_H_ | ||
| #define IREE_COMPILER_CODEGEN_DIALECT_GPU_IR_DERIVEDCONFIGUTILS_H_ | ||
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| #include "mlir/IR/Operation.h" | ||
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| namespace mlir::iree_compiler::IREE::GPU { | ||
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| SmallVector<int64_t> deriveThreadTileSizes(Operation *op); | ||
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| } // namespace mlir::iree_compiler::IREE::GPU | ||
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| #endif // IREE_COMPILER_CODEGEN_DIALECT_GPU_IR_DERIVEDCONFIGUTILS_H_ |
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