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tests: benchmarks: Test fast UART with different GD frequencies
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Default GD frequency is 320MHz
Validate fast UART with 256, 128 and 64MHz

Signed-off-by: Bartosz Miller <[email protected]>
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nordic-bami authored and rlubos committed Dec 19, 2024
1 parent 26eb8eb commit 6942e59
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Showing 5 changed files with 120 additions and 6 deletions.
32 changes: 32 additions & 0 deletions tests/benchmarks/multicore/idle_uarte/Kconfig
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@@ -0,0 +1,32 @@
#
# Copyright (c) 2024 Nordic Semiconductor ASA
#
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
#

choice GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION
prompt "Global domain clock frequency"
default GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_320MHZ

config GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_320MHZ
bool "320MHz"

config GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_256MHZ
bool "256MHz"

config GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_128MHZ
bool "128MHz"

config GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_64MHZ
bool "64MHz"

endchoice

config GLOBAL_DOMAIN_CLOCK_FREQUENCY_MHZ
int
default 320 if GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_320MHZ
default 256 if GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_256MHZ
default 128 if GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_128MHZ
default 64 if GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_64MHZ

source "Kconfig.zephyr"
5 changes: 3 additions & 2 deletions tests/benchmarks/multicore/idle_uarte/Kconfig.sysbuild
Original file line number Diff line number Diff line change
@@ -1,10 +1,11 @@
#
# Copyright (c) 2023 Nordic Semiconductor ASA
# Copyright (c) 2024 Nordic Semiconductor ASA
#
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
#

source "${ZEPHYR_BASE}/share/sysbuild/Kconfig"

config REMOTE_BOARD
string "The board used for remote target"
string
default "$(BOARD)/nrf54h20/cpurad" if SOC_NRF54H20_CPUAPP
40 changes: 40 additions & 0 deletions tests/benchmarks/multicore/idle_uarte/src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
#include <zephyr/pm/device_runtime.h>
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/devicetree/clocks.h>
#include <zephyr/drivers/clock_control/nrf_clock_control.h>

/* Note: logging is normally disabled for this test
* Enable only for debugging purposes
Expand All @@ -32,6 +34,39 @@ const uint8_t test_pattern[TEST_BUFFER_LEN] = {0x11, 0x12, 0x13, 0x14, 0x15,
static uint8_t test_buffer[TEST_BUFFER_LEN];
static volatile uint8_t uart_error_counter;

#if defined(CONFIG_CLOCK_CONTROL)
const struct nrf_clock_spec clk_spec_global_hsfll = {
.frequency = MHZ(CONFIG_GLOBAL_DOMAIN_CLOCK_FREQUENCY_MHZ)
};

/*
* Set Global Domain frequency (HSFLL120)
* based on: CONFIG_GLOBAL_DOMAIN_CLOCK_FREQUENCY_MHZ
*/
void set_global_domain_frequency(void)
{
int err;
int res;
struct onoff_client cli;
const struct device *hsfll_dev = DEVICE_DT_GET(DT_NODELABEL(hsfll120));

printk("Requested frequency [Hz]: %d\n", clk_spec_global_hsfll.frequency);
sys_notify_init_spinwait(&cli.notify);
err = nrf_clock_control_request(hsfll_dev, &clk_spec_global_hsfll, &cli);
printk("Return code: %d\n", err);
__ASSERT_NO_MSG(err < 3);
__ASSERT_NO_MSG(err >= 0);
do {
err = sys_notify_fetch_result(&cli.notify, &res);
k_yield();
} while (err == -EAGAIN);
printk("Clock control request return value: %d\n", err);
printk("Clock control request response code: %d\n", res);
__ASSERT_NO_MSG(err == 0);
__ASSERT_NO_MSG(res == 0);
}
#endif /* CONFIG_CLOCK_CONTROL */

/*
* Callback function for UART async transmission
*/
Expand Down Expand Up @@ -110,6 +145,11 @@ int main(void)
.data_bits = UART_CFG_DATA_BITS_8,
.flow_ctrl = UART_CFG_FLOW_CTRL_RTS_CTS};

#if defined(CONFIG_CLOCK_CONTROL)
k_msleep(1000);
set_global_domain_frequency();
#endif

printk("Hello World! %s\n", CONFIG_BOARD_TARGET);
printk("UART instance: %s\n", uart_dev->name);

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This file was deleted.

48 changes: 45 additions & 3 deletions tests/benchmarks/multicore/idle_uarte/testcase.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,6 @@ tests:
integration_platforms:
- nrf54h20dk/nrf54h20/cpuapp
extra_args:
- SB_CONF_FILE=sysbuild/nrf54h20dk_nrf54h20_cpurad.conf
- DTC_OVERLAY_FILE="boards/nrf54h20dk_nrf54h20_cpuapp_normal.overlay"
harness_config:
fixture: gpio_loopback
Expand All @@ -25,21 +24,64 @@ tests:
integration_platforms:
- nrf54h20dk/nrf54h20/cpuapp
extra_args:
- SB_CONF_FILE=sysbuild/nrf54h20dk_nrf54h20_cpurad.conf
- DTC_OVERLAY_FILE="boards/nrf54h20dk_nrf54h20_cpuapp_fast.overlay"
harness_config:
fixture: gpio_loopback
pytest_root:
- "${CUSTOM_ROOT_TEST_DIR}/test_measure_power_consumption.py::test_measure_and_data_dump_power_consumption_uarte"

benchmarks.multicore.idle_uarte.fast.gd_freq_256MHz.nrf54h20dk_cpuapp_cpurad.s2ram:
harness: pytest
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp
integration_platforms:
- nrf54h20dk/nrf54h20/cpuapp
extra_args:
- DTC_OVERLAY_FILE="boards/nrf54h20dk_nrf54h20_cpuapp_fast.overlay"
- CONFIG_CLOCK_CONTROL=y
- CONFIG_GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_256MHZ=y
harness_config:
fixture: gpio_loopback
pytest_root:
- "${CUSTOM_ROOT_TEST_DIR}/test_measure_power_consumption.py::test_measure_and_data_dump_power_consumption_uarte"

benchmarks.multicore.idle_uarte.fast.gd_freq_128MHz.nrf54h20dk_cpuapp_cpurad.s2ram:
harness: pytest
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp
integration_platforms:
- nrf54h20dk/nrf54h20/cpuapp
extra_args:
- DTC_OVERLAY_FILE="boards/nrf54h20dk_nrf54h20_cpuapp_fast.overlay"
- CONFIG_CLOCK_CONTROL=y
- CONFIG_GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_128MHZ=y
harness_config:
fixture: gpio_loopback
pytest_root:
- "${CUSTOM_ROOT_TEST_DIR}/test_measure_power_consumption.py::test_measure_and_data_dump_power_consumption_uarte"

benchmarks.multicore.idle_uarte.fast.gd_freq_64MHz.nrf54h20dk_cpuapp_cpurad.s2ram:
harness: pytest
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp
integration_platforms:
- nrf54h20dk/nrf54h20/cpuapp
extra_args:
- DTC_OVERLAY_FILE="boards/nrf54h20dk_nrf54h20_cpuapp_fast.overlay"
- CONFIG_CLOCK_CONTROL=y
- CONFIG_GLOBAL_DOMAIN_CLOCK_FREQUENCY_OPTION_64MHZ=y
harness_config:
fixture: gpio_loopback
pytest_root:
- "${CUSTOM_ROOT_TEST_DIR}/test_measure_power_consumption.py::test_measure_and_data_dump_power_consumption_uarte"

benchmarks.multicore.idle_uarte.automatic_pm.nrf54h20dk_cpuapp_cpurad.s2ram:
harness: pytest
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp
integration_platforms:
- nrf54h20dk/nrf54h20/cpuapp
extra_args:
- SB_CONF_FILE=sysbuild/nrf54h20dk_nrf54h20_cpurad.conf
- DTC_OVERLAY_FILE="boards/nrf54h20dk_nrf54h20_cpuapp_normal.overlay"
- CONFIG_PRINTK=y
- CONFIG_LOG=y
Expand Down

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