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2f2b60f
mcux-sdk: update to SDK 2.16.000
dleach02 Aug 1, 2024
d05a46f
mcux: conn_loader: Patch cmake for TFM
dleach02 Aug 8, 2024
03bfc40
dts: nxp: nxp_imx: rt: add pinctrl for mimxrt1189
lucien-nxp May 17, 2024
1dc792c
dts: nxp: nxp_imx: rt: fix up pinctrl files by imx_fixup_pinmux.py
lucien-nxp May 30, 2024
d8281e4
dts:nxp:mcx: Add MCXN236 pinctrl files
NeilChen93 May 28, 2024
874c859
mcux: add MCXN236 support in hal_nxp.cmake
NeilChen93 May 28, 2024
26b73d2
cmake: Add cmake files for MCXN236
NeilChen93 May 29, 2024
85dbc65
mcux: mcux-sdk: add common driver: s3mu/trdc and device driver ele_ba…
lucien-nxp Jul 17, 2024
cd1658a
mcux: mcux-sdk: drivers: s3mu: Update BIT macro name
lucien-nxp Jul 17, 2024
d3a2749
TEMP: UPDATE README
dleach02 Aug 1, 2024
9de5597
mcux-sdk: add rt1180 build support
dleach02 Aug 1, 2024
b00b285
mcux: mcux-sdk-middleware-usb: Add SDK 2.16.000
dleach02 Aug 1, 2024
fedfe6a
mcux: README: Update information for v2.16.000
dleach02 Aug 1, 2024
7cd5ba2
mcux: drivers: mipi_dsi_spit\fsl_mipi_dsi.c double promotion warning fix
dleach02 Aug 5, 2024
1283aef
mcux: MCX: avoid SCB->VTOR setting
dleach02 Aug 6, 2024
7473f45
mcux: hal_nxp: support MCXC series cmake build
NeilChen93 Aug 6, 2024
2ce4fb6
dts: Add pinctrl files for mcxa156
NeilChen93 Aug 5, 2024
801bfba
mcux: MCXA156: add cmake files
NeilChen93 Aug 5, 2024
c918fc3
dts: Add pinctrl files for mcxc444
NeilChen93 Jul 5, 2024
7f57091
mcux: MCXC444: add cmake files
NeilChen93 Jul 5, 2024
dcea75b
middleware: usb: add sof support for zephyr
MarkWangChinese Aug 5, 2024
fb28282
mcux-sdk: add rt1180 build environment support
lucien-nxp Aug 5, 2024
8113337
mcux: hal_nxp: include mflash component for conn_fwloader
fengming-ye Aug 8, 2024
967d613
dts: Add pinctrl files for MCXC242, 142 and 141
michal-smola Aug 6, 2024
20613d1
mcux: MCXC242, 142, 141: Add cmake files
michal-smola Aug 6, 2024
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618 changes: 618 additions & 0 deletions dts/nxp/mcx/MCXA156VLL-pinctrl.h

Large diffs are not rendered by default.

428 changes: 428 additions & 0 deletions dts/nxp/mcx/MCXA156VMP-pinctrl.h

Large diffs are not rendered by default.

623 changes: 623 additions & 0 deletions dts/nxp/mcx/MCXA156VPJ-pinctrl.h

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170 changes: 170 additions & 0 deletions dts/nxp/mcx/MCXC141VFM-pinctrl.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,170 @@
/*
* NOTE: Autogenerated file by gen_soc_headers.py
* for MCXC141VFM/signal_configuration.xml
*
* Copyright 2024 NXP
* SPDX-License-Identifier: Apache-2.0
*/

#ifndef _ZEPHYR_DTS_BINDING_MCXC141VFM_
#define _ZEPHYR_DTS_BINDING_MCXC141VFM_

#define KINETIS_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))

#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
#define TPM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
#define SWD_CLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
#define LPUART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
#define TPM2_CH0_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
#define LPUART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
#define TPM2_CH1_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
#define I2C1_SCL_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
#define TPM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
#define SWD_DIO_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
#define I2C1_SDA_PTA4 KINETIS_MUX('A',4,2) /* PTA4 */
#define TPM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
#define LPUART1_RX_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
#define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
#define LPUART1_TX_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
#define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
#define PTA20 KINETIS_MUX('A',20,1) /* PTA20 */
#define RESET_b_PTA20 KINETIS_MUX('A',20,7) /* PTA20 */
#define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
#define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
#define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
#define SPI1_MOSI_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */
#define SPI1_MISO_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */
#define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
#define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
#define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
#define SPI1_MISO_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */
#define SPI1_MOSI_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */
#define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
#define RTC_CLKIN_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
#define I2C1_SCL_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
#define TPM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
#define ADC0_SE11_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
#define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
#define I2C1_SDA_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
#define TPM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
#define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
#define SPI1_SCK_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
#define LPUART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
#define TPM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
#define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
#define LPUART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
#define TPM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
#define SPI1_PCS0_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */
#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
#define SPI0_MOSI_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
#define EXTRG_IN_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
#define SPI0_MISO_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */
#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
#define SPI0_MISO_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
#define SPI0_MOSI_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */
#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
#define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
#define UART2_RX_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
#define TPM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
#define FXIO0_D4_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
#define SPI1_SCK_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
#define UART2_TX_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
#define TPM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
#define FXIO0_D5_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
#define SPI1_MOSI_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
#define LPUART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
#define I2C1_SDA_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
#define SPI1_MISO_PTD6 KINETIS_MUX('D',6,5) /* PTD6 */
#define FXIO0_D6_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
#define SPI1_MISO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
#define LPUART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
#define I2C1_SCL_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
#define SPI1_MOSI_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */
#define FXIO0_D7_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define CLKOUT32K_PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
#define SPI1_MISO_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
#define LPUART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */
#define CMP0_OUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
#define SPI1_MOSI_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
#define LPUART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
#define SPI1_MISO_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
#define ADC0_DP1_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define ADC0_SE1_PTE16 KINETIS_MUX('E',16,0) /* PTE16 */
#define PTE16 KINETIS_MUX('E',16,1) /* PTE16 */
#define SPI0_PCS0_PTE16 KINETIS_MUX('E',16,2) /* PTE16 */
#define UART2_TX_PTE16 KINETIS_MUX('E',16,3) /* PTE16 */
#define TPM_CLKIN0_PTE16 KINETIS_MUX('E',16,4) /* PTE16 */
#define FXIO0_D0_PTE16 KINETIS_MUX('E',16,6) /* PTE16 */
#define ADC0_DM1_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define ADC0_SE5a_PTE17 KINETIS_MUX('E',17,0) /* PTE17 */
#define PTE17 KINETIS_MUX('E',17,1) /* PTE17 */
#define SPI0_SCK_PTE17 KINETIS_MUX('E',17,2) /* PTE17 */
#define UART2_RX_PTE17 KINETIS_MUX('E',17,3) /* PTE17 */
#define TPM_CLKIN1_PTE17 KINETIS_MUX('E',17,4) /* PTE17 */
#define LPTMR0_ALT3_PTE17 KINETIS_MUX('E',17,5) /* PTE17 */
#define FXIO0_D1_PTE17 KINETIS_MUX('E',17,6) /* PTE17 */
#define ADC0_SE2_PTE18 KINETIS_MUX('E',18,0) /* PTE18 */
#define ADC0_DP2_PTE18 KINETIS_MUX('E',18,0) /* PTE18 */
#define PTE18 KINETIS_MUX('E',18,1) /* PTE18 */
#define SPI0_MOSI_PTE18 KINETIS_MUX('E',18,2) /* PTE18 */
#define I2C0_SDA_PTE18 KINETIS_MUX('E',18,4) /* PTE18 */
#define SPI0_MISO_PTE18 KINETIS_MUX('E',18,5) /* PTE18 */
#define FXIO0_D2_PTE18 KINETIS_MUX('E',18,6) /* PTE18 */
#define ADC0_SE6a_PTE19 KINETIS_MUX('E',19,0) /* PTE19 */
#define ADC0_DM2_PTE19 KINETIS_MUX('E',19,0) /* PTE19 */
#define PTE19 KINETIS_MUX('E',19,1) /* PTE19 */
#define SPI0_MISO_PTE19 KINETIS_MUX('E',19,2) /* PTE19 */
#define I2C0_SCL_PTE19 KINETIS_MUX('E',19,4) /* PTE19 */
#define SPI0_MOSI_PTE19 KINETIS_MUX('E',19,5) /* PTE19 */
#define FXIO0_D3_PTE19 KINETIS_MUX('E',19,6) /* PTE19 */
#define VREF_OUT_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define ADC0_SE23_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define CMP0_IN4_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */
#define PTE30 KINETIS_MUX('E',30,1) /* PTE30 */
#define TPM0_CH3_PTE30 KINETIS_MUX('E',30,3) /* PTE30 */
#define TPM_CLKIN1_PTE30 KINETIS_MUX('E',30,4) /* PTE30 */
#define LPUART1_TX_PTE30 KINETIS_MUX('E',30,5) /* PTE30 */
#define LPTMR0_ALT1_PTE30 KINETIS_MUX('E',30,6) /* PTE30 */
#endif
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