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openocd: fix conversion string for stdint values
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Detected while converting 'unsigned' to 'unsigned int'.

Use the correct conversion string for stdint values.

Change-Id: I99f3dff4c64dfd7acf2bddb130b56e9ebe1e6c60
Signed-off-by: Antonio Borneo <[email protected]>
Reviewed-on: https://review.openocd.org/c/openocd/+/8477
Tested-by: jenkins
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@borneoa
borneoa committed Oct 5, 2024
1 parent 8750bee commit bf1cf4a
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Showing 24 changed files with 78 additions and 102 deletions.
5 changes: 2 additions & 3 deletions src/flash/nand/at91sam9.c
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Original file line number Diff line number Diff line change
Expand Up @@ -389,9 +389,8 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
uint32_t bit = parity & 0x0F;

data[word] ^= (0x1) << bit;
LOG_INFO("Data word %d, bit %d corrected.",
(unsigned) word,
(unsigned) bit);
LOG_INFO("Data word %" PRIu32 ", bit %" PRIu32 " corrected.",
word, bit);
}
}

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3 changes: 1 addition & 2 deletions src/flash/nand/lpc3180.c
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Original file line number Diff line number Diff line change
Expand Up @@ -890,8 +890,7 @@ static int lpc3180_read_page(struct nand_device *nand,

if (mlc_isr & 0x8) {
if (mlc_isr & 0x40) {
LOG_ERROR("uncorrectable error detected: 0x%2.2x",
(unsigned)mlc_isr);
LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr);
free(page_buffer);
free(oob_buffer);
return ERROR_NAND_OPERATION_FAILED;
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3 changes: 1 addition & 2 deletions src/flash/nand/lpc32xx.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1386,8 +1386,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,

if (mlc_isr & 0x8) {
if (mlc_isr & 0x40) {
LOG_ERROR("uncorrectable error detected: "
"0x%2.2x", (unsigned)mlc_isr);
LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr);
return ERROR_NAND_OPERATION_FAILED;
}

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10 changes: 5 additions & 5 deletions src/flash/nor/at91sam3.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2051,7 +2051,7 @@ static int efc_start_command(struct sam3_bank_private *private,
case AT91C_EFC_FCMD_CLB:
n = (private->size_bytes / private->page_size);
if (argument >= n)
LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
break;

case AT91C_EFC_FCMD_SFB:
Expand Down Expand Up @@ -2867,8 +2867,8 @@ static int sam3_read_this_reg(struct sam3_chip *chip, uint32_t *goes_here)

r = target_read_u32(chip->target, reg->address, goes_here);
if (r != ERROR_OK) {
LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d",
reg->name, (unsigned)(reg->address), r);
LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Err: %d",
reg->name, reg->address, r);
}
return r;
}
Expand All @@ -2883,8 +2883,8 @@ static int sam3_read_all_regs(struct sam3_chip *chip)
r = sam3_read_this_reg(chip,
sam3_get_reg_ptr(&(chip->cfg), reg));
if (r != ERROR_OK) {
LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Error: %d",
reg->name, ((unsigned)(reg->address)), r);
LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Error: %d",
reg->name, reg->address, r);
return r;
}
reg++;
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10 changes: 5 additions & 5 deletions src/flash/nor/at91sam4.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1501,7 +1501,7 @@ static int efc_start_command(struct sam4_bank_private *private,
case AT91C_EFC_FCMD_CLB:
n = (private->size_bytes / private->page_size);
if (argument >= n)
LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
break;

case AT91C_EFC_FCMD_SFB:
Expand Down Expand Up @@ -2374,8 +2374,8 @@ static int sam4_read_this_reg(struct sam4_chip *chip, uint32_t *goes_here)

r = target_read_u32(chip->target, reg->address, goes_here);
if (r != ERROR_OK) {
LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Err: %d",
reg->name, (unsigned)(reg->address), r);
LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Err: %d",
reg->name, reg->address, r);
}
return r;
}
Expand All @@ -2390,8 +2390,8 @@ static int sam4_read_all_regs(struct sam4_chip *chip)
r = sam4_read_this_reg(chip,
sam4_get_reg_ptr(&(chip->cfg), reg));
if (r != ERROR_OK) {
LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Error: %d",
reg->name, ((unsigned)(reg->address)), r);
LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Error: %d",
reg->name, reg->address, r);
return r;
}
reg++;
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3 changes: 1 addition & 2 deletions src/flash/nor/cfi.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2219,8 +2219,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u
uint8_t current_word[CFI_MAX_BUS_WIDTH];
int retval;

LOG_DEBUG("reading buffer of %i byte at 0x%8.8x",
(int)count, (unsigned)offset);
LOG_DEBUG("reading buffer of %" PRIi32 " byte at 0x%8.8" PRIx32, count, offset);

if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
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4 changes: 2 additions & 2 deletions src/flash/nor/max32xxx.c
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Original file line number Diff line number Diff line change
Expand Up @@ -388,8 +388,8 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer,
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}

LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
target_name(target), (unsigned) buffer_size);
LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")",
target_name(target), buffer_size);
}

target_write_buffer(target, write_algorithm->address, sizeof(write_code),
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4 changes: 2 additions & 2 deletions src/flash/nor/stellaris.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1056,8 +1056,8 @@ static int stellaris_write_block(struct flash_bank *bank,
target_free_working_area(target, write_algorithm);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
target_name(target), (unsigned) buffer_size);
LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")",
target_name(target), buffer_size);
}

target_write_buffer(target, write_algorithm->address,
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4 changes: 2 additions & 2 deletions src/flash/nor/tms470.c
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Original file line number Diff line number Diff line change
Expand Up @@ -239,8 +239,8 @@ static int tms470_read_part_info(struct flash_bank *bank)
break;

default:
LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.",
(unsigned)part_number);
LOG_WARNING("Could not identify part 0x%02" PRIx32 " as a member of the TMS470 family.",
part_number);
return ERROR_FLASH_OPERATION_FAILED;
}

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5 changes: 2 additions & 3 deletions src/jtag/core.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1473,10 +1473,9 @@ void jtag_tap_init(struct jtag_tap *tap)
jtag_tap_add(tap);

LOG_DEBUG("Created Tap: %s @ abs position %u, "
"irlen %u, capture: 0x%x mask: 0x%x", tap->dotted_name,
"irlen %u, capture: 0x%" PRIx32 " mask: 0x%" PRIx32, tap->dotted_name,
tap->abs_chain_position, tap->ir_length,
(unsigned) tap->ir_capture_value,
(unsigned) tap->ir_capture_mask);
tap->ir_capture_value, tap->ir_capture_mask);
}

void jtag_tap_free(struct jtag_tap *tap)
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9 changes: 3 additions & 6 deletions src/jtag/tcl.c
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Original file line number Diff line number Diff line change
Expand Up @@ -803,10 +803,8 @@ COMMAND_HANDLER(handle_scan_chain_command)
while (tap) {
uint32_t expected, expected_mask, ii;

snprintf(expected_id, sizeof(expected_id), "0x%08x",
(unsigned)((tap->expected_ids_cnt > 0)
? tap->expected_ids[0]
: 0));
snprintf(expected_id, sizeof(expected_id), "0x%08" PRIx32,
(tap->expected_ids_cnt > 0) ? tap->expected_ids[0] : 0);
if (tap->ignore_version)
expected_id[2] = '*';

Expand All @@ -825,8 +823,7 @@ COMMAND_HANDLER(handle_scan_chain_command)
(unsigned int)(expected_mask));

for (ii = 1; ii < tap->expected_ids_cnt; ii++) {
snprintf(expected_id, sizeof(expected_id), "0x%08x",
(unsigned) tap->expected_ids[ii]);
snprintf(expected_id, sizeof(expected_id), "0x%08" PRIx32, tap->expected_ids[ii]);
if (tap->ignore_version)
expected_id[2] = '*';

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15 changes: 6 additions & 9 deletions src/target/arm11.c
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Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ static int arm11_check_init(struct arm11_common *arm11)
CHECK_RETVAL(arm11_read_dscr(arm11));

if (!(arm11->dscr & DSCR_HALT_DBG_MODE)) {
LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr);
LOG_DEBUG("DSCR %08" PRIx32, arm11->dscr);
LOG_DEBUG("Bringing target into debug mode");

arm11->dscr |= DSCR_HALT_DBG_MODE;
Expand Down Expand Up @@ -241,8 +241,7 @@ static int arm11_leave_debug_state(struct arm11_common *arm11, bool bpwp)
registers hold data that was written by one side (CPU or JTAG) and not
read out by the other side.
*/
LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08x)",
(unsigned) arm11->dscr);
LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08" PRIx32 ")", arm11->dscr);
return ERROR_FAIL;
}
}
Expand Down Expand Up @@ -516,7 +515,7 @@ static int arm11_resume(struct target *target, int current,
while (1) {
CHECK_RETVAL(arm11_read_dscr(arm11));

LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr);
LOG_DEBUG("DSCR %08" PRIx32, arm11->dscr);

if (arm11->dscr & DSCR_CORE_RESTARTED)
break;
Expand Down Expand Up @@ -662,7 +661,7 @@ static int arm11_step(struct target *target, int current,
| DSCR_CORE_HALTED;

CHECK_RETVAL(arm11_read_dscr(arm11));
LOG_DEBUG("DSCR %08x e", (unsigned) arm11->dscr);
LOG_DEBUG("DSCR %08" PRIx32 " e", arm11->dscr);

if ((arm11->dscr & mask) == mask)
break;
Expand Down Expand Up @@ -1012,10 +1011,8 @@ static int arm11_write_memory_inner(struct target *target,
return retval;

if (address + size * count != r0) {
LOG_ERROR("Data transfer failed. Expected end "
"address 0x%08x, got 0x%08x",
(unsigned) (address + size * count),
(unsigned) r0);
LOG_ERROR("Data transfer failed. Expected end address 0x%08" PRIx32 ", got 0x%08" PRIx32,
address + size * count, r0);

if (burst)
LOG_ERROR(
Expand Down
25 changes: 10 additions & 15 deletions src/target/arm11_dbgtap.c
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Original file line number Diff line number Diff line change
Expand Up @@ -242,7 +242,7 @@ int arm11_add_debug_scan_n(struct arm11_common *arm11,
static void arm11_add_debug_inst(struct arm11_common *arm11,
uint32_t inst, uint8_t *flag, tap_state_t state)
{
JTAG_DEBUG("INST <= 0x%08x", (unsigned) inst);
JTAG_DEBUG("INST <= 0x%08" PRIx32, inst);

struct scan_field itr[2];

Expand Down Expand Up @@ -282,9 +282,7 @@ int arm11_read_dscr(struct arm11_common *arm11)
CHECK_RETVAL(jtag_execute_queue());

if (arm11->dscr != dscr)
JTAG_DEBUG("DSCR = %08x (OLD %08x)",
(unsigned) dscr,
(unsigned) arm11->dscr);
JTAG_DEBUG("DSCR = %08" PRIx32 " (OLD %08" PRIx32 ")", dscr, arm11->dscr);

arm11->dscr = dscr;

Expand Down Expand Up @@ -317,9 +315,7 @@ int arm11_write_dscr(struct arm11_common *arm11, uint32_t dscr)

CHECK_RETVAL(jtag_execute_queue());

JTAG_DEBUG("DSCR <= %08x (OLD %08x)",
(unsigned) dscr,
(unsigned) arm11->dscr);
JTAG_DEBUG("DSCR <= %08" PRIx32 " (OLD %08" PRIx32 ")", dscr, arm11->dscr);

arm11->dscr = dscr;

Expand Down Expand Up @@ -509,8 +505,8 @@ int arm11_run_instr_data_to_core(struct arm11_common *arm11,

CHECK_RETVAL(jtag_execute_queue());

JTAG_DEBUG("DTR _data %08x ready %d n_retry %d",
(unsigned) _data, ready, n_retry);
JTAG_DEBUG("DTR _data %08" PRIx32 " ready %d n_retry %d",
_data, ready, n_retry);

int64_t then = 0;

Expand Down Expand Up @@ -754,8 +750,8 @@ int arm11_run_instr_data_from_core(struct arm11_common *arm11,

CHECK_RETVAL(jtag_execute_queue());

JTAG_DEBUG("DTR _data %08x ready %d n_retry %d",
(unsigned) _data, ready, n_retry);
JTAG_DEBUG("DTR _data %08" PRIx32 " ready %d n_retry %d",
_data, ready, n_retry);

int64_t then = 0;

Expand Down Expand Up @@ -878,9 +874,8 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions,
/* Timeout here so we don't get stuck. */
int i_n = 0;
while (1) {
JTAG_DEBUG("SC7 <= c%-3d Data %08x %s",
(unsigned) address_out,
(unsigned) data_out,
JTAG_DEBUG("SC7 <= c%-3" PRIu8 " Data %08" PRIx32 " %s",
address_out, data_out,
n_rw ? "write" : "read");

arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain7_fields),
Expand Down Expand Up @@ -908,7 +903,7 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions,
}

if (!n_rw)
JTAG_DEBUG("SC7 => Data %08x", (unsigned) data_in);
JTAG_DEBUG("SC7 => Data %08" PRIx32, data_in);

if (i > 0) {
if (actions[i - 1].address != address_in)
Expand Down
15 changes: 7 additions & 8 deletions src/target/arm_disassembler.c
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Original file line number Diff line number Diff line change
Expand Up @@ -266,18 +266,18 @@ static int evaluate_srs(uint32_t opcode,
case 0x08400000:
snprintf(instruction->text, 128, "0x%8.8" PRIx32
"\t0x%8.8" PRIx32
"\tSRS%s\tSP%s, #%d",
"\tSRS%s\tSP%s, #%" PRIu32,
address, opcode,
mode, wback,
(unsigned)(opcode & 0x1f));
opcode & 0x1f);
break;
case 0x08100000:
snprintf(instruction->text, 128, "0x%8.8" PRIx32
"\t0x%8.8" PRIx32
"\tRFE%s\tr%d%s",
"\tRFE%s\tr%" PRIu32 "%s",
address, opcode,
mode,
(unsigned)((opcode >> 16) & 0xf), wback);
(opcode >> 16) & 0xf, wback);
break;
default:
return evaluate_unknown(opcode, address, instruction);
Expand Down Expand Up @@ -842,7 +842,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
/* halfword pack */
if ((opcode & 0x01f00020) == 0x00800000) {
char *type, *shift;
unsigned imm = (unsigned) (opcode >> 7) & 0x1f;
unsigned int imm = (opcode >> 7) & 0x1f;

if (opcode & (1 << 6)) {
type = "TB";
Expand All @@ -865,7 +865,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
/* word saturate */
if ((opcode & 0x01a00020) == 0x00a00000) {
char *shift;
unsigned imm = (unsigned) (opcode >> 7) & 0x1f;
unsigned int imm = (opcode >> 7) & 0x1f;

if (opcode & (1 << 6)) {
shift = "ASR";
Expand Down Expand Up @@ -2046,8 +2046,7 @@ int arm_evaluate_opcode(uint32_t opcode, uint32_t address,
return evaluate_cdp_mcr_mrc(opcode, address, instruction);
}

LOG_ERROR("ARM: should never reach this point (opcode=%08x)",
(unsigned) opcode);
LOG_ERROR("ARM: should never reach this point (opcode=%08" PRIx32 ")", opcode);
return -1;
}

Expand Down
10 changes: 4 additions & 6 deletions src/target/arm_dpm.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -198,8 +198,7 @@ static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
buf_set_u32(r->value + 4, 0, 32, value_r1);
r->valid = true;
r->dirty = false;
LOG_DEBUG("READ: %s, %8.8x, %8.8x", r->name,
(unsigned) value_r0, (unsigned) value_r1);
LOG_DEBUG("READ: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
}

return retval;
Expand Down Expand Up @@ -266,7 +265,7 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
buf_set_u32(r->value, 0, 32, value);
r->valid = true;
r->dirty = false;
LOG_DEBUG("READ: %s, %8.8x", r->name, (unsigned) value);
LOG_DEBUG("READ: %s, %8.8" PRIx32, r->name, value);
}

return retval;
Expand Down Expand Up @@ -302,8 +301,7 @@ static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum

if (retval == ERROR_OK) {
r->dirty = false;
LOG_DEBUG("WRITE: %s, %8.8x, %8.8x", r->name,
(unsigned) value_r0, (unsigned) value_r1);
LOG_DEBUG("WRITE: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
}

return retval;
Expand Down Expand Up @@ -351,7 +349,7 @@ static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)

if (retval == ERROR_OK) {
r->dirty = false;
LOG_DEBUG("WRITE: %s, %8.8x", r->name, (unsigned) value);
LOG_DEBUG("WRITE: %s, %8.8" PRIx32, r->name, value);
}

return retval;
Expand Down
2 changes: 1 addition & 1 deletion src/target/armv4_5.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -482,7 +482,7 @@ void arm_set_cpsr(struct arm *arm, uint32_t cpsr)
}
arm->core_state = state;

LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr,
LOG_DEBUG("set CPSR %#8.8" PRIx32 ": %s mode, %s state", cpsr,
arm_mode_name(mode),
arm_state_strings[arm->core_state]);
}
Expand Down
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