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target/cortex_m: support Infineon Cortex-M33 from SLx2 MCU
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The secure microcontroller Infineon SLx2 uses a custom Cortex-M33.
The register CPUID reports value 0x490FDB00.

Reference link to the product:
Link: https://www.infineon.com/cms/en/about-infineon/press/market-news/2022/INFCSS202211-034.html

Change-Id: I8911712c55bd50e24ed53cf49958352f470027a5
Signed-off-by: Ahmed Boughanmi <[email protected]>
Reviewed-on: https://review.openocd.org/c/openocd/+/7879
Reviewed-by: Karl Palsson <[email protected]>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <[email protected]>
Reviewed-by: Tomas Vanek <[email protected]>
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boughanmi91 authored and tom-van committed Oct 2, 2023
1 parent c6ab3ab commit f76c8de
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Showing 3 changed files with 20 additions and 13 deletions.
1 change: 1 addition & 0 deletions src/target/arm.h
Original file line number Diff line number Diff line change
Expand Up @@ -61,6 +61,7 @@ enum arm_arch {
/** Known ARM implementor IDs */
enum arm_implementor {
ARM_IMPLEMENTOR_ARM = 0x41,
ARM_IMPLEMENTOR_INFINEON = 0x49,
ARM_IMPLEMENTOR_REALTEK = 0x72,
};

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5 changes: 5 additions & 0 deletions src/target/cortex_m.c
Original file line number Diff line number Diff line change
Expand Up @@ -111,6 +111,11 @@ static const struct cortex_m_part_info cortex_m_parts[] = {
.arch = ARM_ARCH_V8M,
.flags = CORTEX_M_F_HAS_FPV5,
},
{
.impl_part = INFINEON_SLX2_PARTNO,
.name = "Infineon-SLx2",
.arch = ARM_ARCH_V8M,
},
{
.impl_part = REALTEK_M200_PARTNO,
.name = "Real-M200 (KM0)",
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27 changes: 14 additions & 13 deletions src/target/cortex_m.h
Original file line number Diff line number Diff line change
Expand Up @@ -45,19 +45,20 @@
*/
enum cortex_m_impl_part {
CORTEX_M_PARTNO_INVALID,
STAR_MC1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0x132), /* FIXME - confirm implementor! */
CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
CORTEX_M4_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24),
CORTEX_M7_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27),
CORTEX_M0P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60),
CORTEX_M23_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
CORTEX_M33_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
CORTEX_M55_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
STAR_MC1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0x132), /* FIXME - confirm implementor! */
CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
CORTEX_M4_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24),
CORTEX_M7_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27),
CORTEX_M0P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60),
CORTEX_M23_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
CORTEX_M33_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
CORTEX_M55_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_INFINEON, 0xDB0),
REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
};

/* Relevant Cortex-M flags, used in struct cortex_m_part_info.flags */
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