Final changes made for the draft PR review

src/DesignQuery/scripts/cpp_script_for_sdt_generation/main_sdtgen_cpp_nlohman_lib_v5.cpp

@@ -1,8 +1,28 @@
+/**
+  
+  * @file main_sdtgen_cpp_nlohman_lib_v5.cpp
+  * @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)
+  * @date 2023-08-30
+  * @copyright Copyright 2021 The Foedag team
 
-//**********************************************************************************************************************************
-// JSON to SDT cpp script written by ZaidTahir, for questions please email:
-// [email protected] or [email protected] **************
-// *********************************************************************************************************************************
+  * GPL License
+
+  * Copyright (c) 2021 The Open-Source FPGA Foundation
+
+  * This program is free software: you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation, either version 3 of the License, or
+  * (at your option) any later version.
+
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  * GNU General Public License for more details.
+
+  * You should have received a copy of the GNU General Public License
+  * along with this program.  If not, see <http://www.gnu.org/licenses/>. 
+  
+*/
 
 #include <cstdio>
 
@@ -111,9 +131,26 @@ int main(int, char*[]) {
 
   outfile << "/*\n \
     *\n \
-    *Copyright (c) 2023 Rapid Silicon\n \
-    *SPDX-License-Identifier: rs-eula\n \
-    *JSON to SDT cpp script written by ZaidTahir, for questions please email: [email protected] or [email protected]\n*/\n\n";
+    * @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)\n \
+    * @date 2023-08-30\n \
+    * @copyright Copyright 2021 The Foedag team\n \
+    \n \
+    * GPL License\n \
+    \n \
+    * Copyright (c) 2021 The Open-Source FPGA Foundation\n \
+    \n \
+    * This program is free software: you can redistribute it and/or modify\n \
+    * it under the terms of the GNU General Public License as published by\n \
+    * the Free Software Foundation, either version 3 of the License, or\n \
+    * (at your option) any later version.\n \
+    \n \
+    * This program is distributed in the hope that it will be useful,\n \
+    * but WITHOUT ANY WARRANTY; without even the implied warranty of\n \
+    * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n \
+    * GNU General Public License for more details.\n \
+    \n \
+    * You should have received a copy of the GNU General Public License\n \
+    * along with this program.  If not, see <http://www.gnu.org/licenses/>. \n*/\n\n";
 
   outfile << "/dts-v1/;\n\n"
           << "/ {\n";

src/DesignQuery/scripts/cpp_script_for_sdt_generation/output_sdtgen_cpp_nlohman_lib_v5.sdt

@@ -1,8 +1,25 @@
 /*
      *
-     *Copyright (c) 2023 Rapid Silicon
-     *SPDX-License-Identifier: rs-eula
-     *JSON to SDT cpp script written by ZaidTahir, for questions please email: [email protected] or [email protected]
+     * @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)
+     * @date 2023-08-30
+     * @copyright Copyright 2021 The Foedag team
+
+     * GPL License
+
+     * Copyright (c) 2021 The Open-Source FPGA Foundation
+
+     * This program is free software: you can redistribute it and/or modify
+     * it under the terms of the GNU General Public License as published by
+     * the Free Software Foundation, either version 3 of the License, or
+     * (at your option) any later version.
+
+     * This program is distributed in the hope that it will be useful,
+     * but WITHOUT ANY WARRANTY; without even the implied warranty of
+     * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+     * GNU General Public License for more details.
+
+     * You should have received a copy of the GNU General Public License
+     * along with this program.  If not, see <http://www.gnu.org/licenses/>. 
 */
 
 /dts-v1/;

src/DesignQuery/scripts/cpp_script_for_sdt_generation/sdtgen_cpp_nlohman_lib_v5.cpp

@@ -1,8 +1,29 @@
+/**
+  
+  * @file sdtgen_cpp_nlohman_lib_v5.cpp
+  * @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)
+  * @date 2023-08-30
+  * @copyright Copyright 2021 The Foedag team
+
+  * GPL License
+
+  * Copyright (c) 2021 The Open-Source FPGA Foundation
+
+  * This program is free software: you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation, either version 3 of the License, or
+  * (at your option) any later version.
+
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  * GNU General Public License for more details.
+
+  * You should have received a copy of the GNU General Public License
+  * along with this program.  If not, see <http://www.gnu.org/licenses/>. 
+  
+*/
 
-//**********************************************************************************************************************************
-// JSON to SDT cpp script written by ZaidTahir, for questions please email:
-// [email protected] or [email protected] **************
-// *********************************************************************************************************************************
 #include "sdtgen_cpp_nlohman_lib_v5.h"
 
 #include <cstdio>

src/DesignQuery/scripts/cpp_script_for_sdt_generation/sdtgen_cpp_nlohman_lib_v5.h

@@ -1,8 +1,28 @@
-
-//**********************************************************************************************************************************
-// JSON to SDT cpp script written by ZaidTahir, for questions please email:
-// [email protected] or [email protected] **************
-// *********************************************************************************************************************************
+/**
+  
+  * @file sdtgen_cpp_nlohman_lib_v5.h
+  * @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)
+  * @date 2023-08-30
+  * @copyright Copyright 2021 The Foedag team
+
+  * GPL License
+
+  * Copyright (c) 2021 The Open-Source FPGA Foundation
+
+  * This program is free software: you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation, either version 3 of the License, or
+  * (at your option) any later version.
+
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  * GNU General Public License for more details.
+
+  * You should have received a copy of the GNU General Public License
+  * along with this program.  If not, see <http://www.gnu.org/licenses/>. 
+  
+*/
 
 #ifndef MY_CLASS_H  // include guard
 #define MY_CLASS_H

src/DesignQuery/scripts/tcl_script_for_sdt_generation/output.sdt

@@ -1,8 +1,26 @@
 /*
-  *Copyright (c) 2023 Rapid Silicon
-  *SPDX-License-Identifier: rs-eula
-  *JSON to SDT TCL script written by ZaidTahir, for questions please email: [email protected] or [email protected]
-  */
+  * @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)
+  * @date 2023-08-30
+  * @copyright Copyright 2021 The Foedag team
+
+  * GPL License
+
+  * Copyright (c) 2021 The Open-Source FPGA Foundation
+
+  * This program is free software: you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation, either version 3 of the License, or
+  * (at your option) any later version.
+
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  * GNU General Public License for more details.
+
+  * You should have received a copy of the GNU General Public License
+  * along with this program.  If not, see <http://www.gnu.org/licenses/>. 
+
+*/
 
 
 /dts-v1/;

src/DesignQuery/scripts/tcl_script_for_sdt_generation/sdtgen.tcl

@@ -1,3 +1,29 @@
+# /**
+
+#   * @file main_sdtgen_cpp_nlohman_lib_v5.cpp
+#   * @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)
+#   * @date 2023-08-30
+#   * @copyright Copyright 2021 The Foedag team
+
+#   * GPL License
+
+#   * Copyright (c) 2021 The Open-Source FPGA Foundation
+
+#   * This program is free software: you can redistribute it and/or modify
+#   * it under the terms of the GNU General Public License as published by
+#   * the Free Software Foundation, either version 3 of the License, or
+#   * (at your option) any later version.
+
+#   * This program is distributed in the hope that it will be useful,
+#   * but WITHOUT ANY WARRANTY; without even the implied warranty of
+#   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#   * GNU General Public License for more details.
+
+#   * You should have received a copy of the GNU General Public License
+#   * along with this program.  If not, see <http://www.gnu.org/licenses/>. 
+
+# */
+
 #!/usr/bin/tclsh
 package require json
 package require Tcl 8.5
@@ -9,10 +35,6 @@ if {$::tcl_version < 8.5} {
     package require dict
 }
 
-##########################################################################################################################################
-########## JSON to SDT TCL script written by ZaidTahir, for questions please email: [email protected] or [email protected] ############
-##########################################################################################################################################
-
 # Use this command to run this script: 
 	# "tclsh sdtgen_v6.tcl -o output_v6.sdt -f"
 # All functionality moved to procs in tcl script version5
@@ -416,10 +438,27 @@ proc get_board_info {} {
 
 proc gen_copyright_header {} {
 	set copyrightString "/*\n \
-	*Copyright (c) 2023 Rapid Silicon\n \
-	*SPDX-License-Identifier: rs-eula\n \
-	*JSON to SDT TCL script written by ZaidTahir, for questions please email: [email protected] or [email protected]\n \
-	*/\n\n"
+	* @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)\n \
+  * @date 2023-08-30\n \
+  * @copyright Copyright 2021 The Foedag team\n \
+  \n \
+  * GPL License\n \
+  \n \
+  * Copyright (c) 2021 The Open-Source FPGA Foundation\n \
+  \n \
+  * This program is free software: you can redistribute it and/or modify\n \
+  * it under the terms of the GNU General Public License as published by\n \
+  * the Free Software Foundation, either version 3 of the License, or\n \
+  * (at your option) any later version.\n \
+  \n \
+  * This program is distributed in the hope that it will be useful,\n \
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of\n \
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n \
+  * GNU General Public License for more details.\n \
+  \n \
+  * You should have received a copy of the GNU General Public License\n \
+  * along with this program.  If not, see <http://www.gnu.org/licenses/>. \n\
+	\n*/\n\n"
 
 	return $copyrightString
 }

src/DesignQuery/sdtgen_cpp_nlohman_lib_v6.cpp → src/DesignQuery/sdtgen.cpp

@@ -1,17 +1,34 @@
+/**
+  
+  * @file sdtgen.cpp
+  * @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)
+  * @date 2023-08-30
+  * @copyright Copyright 2021 The Foedag team
 
-//**********************************************************************************************************************************
-// JSON to SDT cpp script written by ZaidTahir, for questions please email:
-// [email protected] or [email protected] **************
-// *********************************************************************************************************************************
+  * GPL License
+
+  * Copyright (c) 2021 The Open-Source FPGA Foundation
+
+  * This program is free software: you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation, either version 3 of the License, or
+  * (at your option) any later version.
+
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  * GNU General Public License for more details.
+
+  * You should have received a copy of the GNU General Public License
+  * along with this program.  If not, see <http://www.gnu.org/licenses/>. 
+  
+*/
 
 #include <cstdio>
-// #include <nlohmann_json/json.hpp>
+
 #include "nlohmann_json/json.hpp"
-// #include "json.hpp"
-// #include "json/single_include/nlohmann/json.hpp"
-// #include <json/single_include/nlohmann/json_fwd.hpp>
 
-#include "sdtgen_cpp_nlohman_lib_v6.h"
+#include "sdtgen.h"
 
 using namespace std;
 

src/DesignQuery/sdtgen_cpp_nlohman_lib_v6.h → src/DesignQuery/sdtgen.h

@@ -1,20 +1,35 @@
+/**
+  
+  * @file sdtgen.h
+  * @author Zaid Tahir ([email protected] or [email protected] or https://github.com/zaidtahirbutt)
+  * @date 2023-08-30
+  * @copyright Copyright 2021 The Foedag team
 
-//**********************************************************************************************************************************
-// JSON to SDT cpp script written by ZaidTahir, for questions please email:
-// [email protected] or [email protected] **************
-// *********************************************************************************************************************************
+  * GPL License
+
+  * Copyright (c) 2021 The Open-Source FPGA Foundation
+
+  * This program is free software: you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation, either version 3 of the License, or
+  * (at your option) any later version.
+
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  * GNU General Public License for more details.
+
+  * You should have received a copy of the GNU General Public License
+  * along with this program.  If not, see <http://www.gnu.org/licenses/>. 
+  
+*/
 
 #ifndef MY_CLASS_H  // include guard
 #define MY_CLASS_H
 
 #include <cstdio>
-// #include <nlohmann_json/json.hpp>
-#include "nlohmann_json/json.hpp"
-// #include "json.hpp"
-// #include "json/single_include/nlohmann/json.hpp"
-// #include <json/single_include/nlohmann/json_fwd.hpp>
 
-// using json = nlohmann::json;
+#include "nlohmann_json/json.hpp"
 
 using namespace std;
 

tests/Testcases/DesignQuery/gbox_top.tcl

@@ -1,17 +1,19 @@
 # puts  [ test_device_modeling_tcl ]
 # puts [ exec date ]
+# puts [ get_file_ids ]  # works now after adding additional code
+
 
 # use "verbose" with tcl command to display debugging information for the sdt generating cpp library "sdtgen_cpp_nlohman_lib_v6"
 
-# puts [ sdt_gen_cpus_node verbose ]
+# # puts [ sdt_gen_cpus_node verbose ]
 puts [ sdt_gen_cpus_node ]
-# # puts [ sdt_gen_cpus_cluster_node verbose ]
+# puts [ sdt_gen_cpus_cluster_node verbose ]
 puts [ sdt_gen_cpus_cluster_node ]
-# # puts [ sdt_gen_memory_node verbose ]
+# puts [ sdt_gen_memory_node verbose ]
 puts [ sdt_gen_memory_node ]
-# # puts [ sdt_gen_soc_node verbose ]
+# puts [ sdt_gen_soc_node verbose ]
 puts [ sdt_gen_soc_node ]
-# # puts [ sdt_gen_root_metadata_node verbose ]
+# # # puts [ sdt_gen_root_metadata_node verbose ]
 puts [ sdt_gen_root_metadata_node ]
 # puts [ sdt_gen_system_device_tree verbose ]
 puts [ sdt_gen_system_device_tree ]

tests/Testcases/DesignQuery/test_parse_design_data.tcl

@@ -25,10 +25,10 @@ set_top_module top
 synth
 
 # Test get_file_ids and error out if the correct file ids weren't captured from the dummy data in hier_info.json
-# set ids [get_file_ids]
-# if { ![string compare $ids "1 10 11 12 2 3 4 5 6 7 8 9"] } {
-#     puts "TEST FAILED: get_file_ids should have generated 1 10 11 12 2 3 4 5 6 7 8 9"
-#     exit 1
-# }
+set ids [get_file_ids]
+if { ![string compare $ids "1 10 11 12 2 3 4 5 6 7 8 9"] } {
+    puts "TEST FAILED: get_file_ids should have generated 1 10 11 12 2 3 4 5 6 7 8 9"
+    exit 1
+}
 
 exit 0