Skip to content

Commit

Permalink
Added vfpr to datapath
Browse files Browse the repository at this point in the history
  • Loading branch information
otoomey committed Mar 1, 2024
1 parent 310bbed commit 53a0c62
Show file tree
Hide file tree
Showing 14 changed files with 2,143 additions and 1,717 deletions.
5 changes: 4 additions & 1 deletion .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -16,4 +16,7 @@ gmon.out

# Installation directories
/.venv/
/tools/
/tools/

# traces
sim.vcd
3 changes: 2 additions & 1 deletion .vscode/lint.py
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,8 @@
'--error-limit',
'9999',
'-Wall',
'-Wno-MULTITOP'
'-Wno-MULTITOP',
'-Wno-MODDUP'
], stderr=subprocess.STDOUT)
except subprocess.CalledProcessError as e:
out = e.output.decode('ascii')
Expand Down
137 changes: 70 additions & 67 deletions .vscode/linter.vc

Large diffs are not rendered by default.

3 changes: 3 additions & 0 deletions Bender.yml
Original file line number Diff line number Diff line change
Expand Up @@ -255,6 +255,9 @@ sources:
- hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv
- hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral.sv
- hw/snitch_cluster/src/snitch_fpu.sv
- hw/snitch_cluster/src/stream_reduce.sv
- hw/snitch_cluster/src/stream_stall.sv
- hw/snitch_cluster/src/stream_merge.sv
- hw/snitch_cluster/src/snitch_tcdm_router.sv
- hw/snitch_cluster/src/snitch_vfpr.sv
- hw/snitch_cluster/src/snitch_sb_ipool.sv
Expand Down
48 changes: 46 additions & 2 deletions hw/snitch/src/snitch_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -176,11 +176,12 @@ package snitch_pkg;
// Trace Infrastructure
// --------------------
// pragma translate_off
typedef enum logic [1:0] {
typedef enum logic [2:0] {
SrcSnitch = 0,
SrcFpu = 1,
SrcFpuSeq = 2,
SrcFpuSB = 3
SrcFpuSB = 3,
SrcFpuVFPR = 4
} trace_src_e;

typedef struct packed {
Expand Down Expand Up @@ -275,6 +276,10 @@ package snitch_pkg;
longint op_0;
longint op_1;
longint op_2;
longint vfpr_in_valid;
longint vfpr_in_ready;
longint vfpr_out_valid;
longint vfpr_out_ready;
longint use_fpu;
longint fpu_in_rd;
longint fpu_in_acc;
Expand Down Expand Up @@ -314,6 +319,10 @@ package snitch_pkg;
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "op_0", fpu_trace.op_0);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "op_1", fpu_trace.op_1);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "op_2", fpu_trace.op_2);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "vfpr_in_valid", fpu_trace.vfpr_in_valid);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "vfpr_in_ready", fpu_trace.vfpr_in_ready);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "vfpr_out_valid", fpu_trace.vfpr_out_valid);

Check warning on line 324 in hw/snitch/src/snitch_pkg.sv

View workflow job for this annotation

GitHub Actions / verible-verilog-lint

[verible-verilog-lint] hw/snitch/src/snitch_pkg.sv#L324

Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]" location:{path:"./hw/snitch/src/snitch_pkg.sv" range:{start:{line:324 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "vfpr_out_ready", fpu_trace.vfpr_out_ready);

Check warning on line 325 in hw/snitch/src/snitch_pkg.sv

View workflow job for this annotation

GitHub Actions / verible-verilog-lint

[verible-verilog-lint] hw/snitch/src/snitch_pkg.sv#L325

Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]" location:{path:"./hw/snitch/src/snitch_pkg.sv" range:{start:{line:325 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "use_fpu", fpu_trace.use_fpu);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "fpu_in_rd", fpu_trace.fpu_in_rd);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "fpu_in_acc", fpu_trace.fpu_in_acc);
Expand Down Expand Up @@ -383,4 +392,39 @@ package snitch_pkg;
return extras_str;
endfunction

typedef struct packed {
longint source;
longint read;
longint read_result;
longint reg0;
longint reg1;
longint reg2;
longint reg_enabled;
longint data0;
longint data1;
longint data2;
longint write;
longint wr_addr;
longint wr_data;
} fpu_vfpr_trace_port_t;

function automatic string print_fpu_vfpr_trace(fpu_vfpr_trace_port_t fpu_vfpr);
string extras_str = "{";
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "source", fpu_vfpr.source);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "read", fpu_vfpr.read);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "read_result", fpu_vfpr.read_result);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "reg0", fpu_vfpr.reg0);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "reg1", fpu_vfpr.reg1);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "reg2", fpu_vfpr.reg2);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "reg_enabled", fpu_vfpr.reg_enabled);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "data0", fpu_vfpr.data0);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "data1", fpu_vfpr.data1);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "data2", fpu_vfpr.data2);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "write", fpu_vfpr.write);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "wr_addr", fpu_vfpr.wr_addr);
extras_str = $sformatf("%s'%s': 0x%0x, ", extras_str, "wr_data", fpu_vfpr.wr_data);
extras_str = $sformatf("%s}", extras_str);
return extras_str;
endfunction

endpackage
11 changes: 11 additions & 0 deletions hw/snitch_cluster/src/snitch_cc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -447,6 +447,7 @@ module snitch_cc #(
snitch_pkg::fpu_trace_port_t fpu_trace;
snitch_pkg::fpu_sequencer_trace_port_t fpu_sequencer_trace;
snitch_pkg::fpu_sb_trace_port_t fpu_sb_trace;
snitch_pkg::fpu_vfpr_trace_port_t fpu_vfpr_trace;
// pragma translate_on

logic [2:0][4:0] ssr_raddr;
Expand Down Expand Up @@ -508,6 +509,7 @@ module snitch_cc #(
.trace_port_o ( fpu_trace ),
.sequencer_tracer_port_o ( fpu_sequencer_trace ),
.sb_tracer_port_o ( fpu_sb_trace ),
.vfpr_tracer_port_o ( fpu_vfpr_trace ),
// pragma translate_on
.hart_id_i ( hart_id_i ),
.acc_req_i ( acc_snitch_req ),
Expand Down Expand Up @@ -870,6 +872,7 @@ module snitch_cc #(
automatic snitch_pkg::fpu_trace_port_t extras_fpu;
automatic snitch_pkg::fpu_sequencer_trace_port_t extras_fpu_seq_out;
automatic snitch_pkg::fpu_sb_trace_port_t extras_fpu_sb_out;
automatic snitch_pkg::fpu_vfpr_trace_port_t extras_fpu_vfpr_out;

if (rst_ni) begin
extras_snitch = '{
Expand Down Expand Up @@ -919,6 +922,7 @@ module snitch_cc #(
// Addenda to FPU extras iff popping sequencer
extras_fpu_seq_out = fpu_sequencer_trace;
extras_fpu_sb_out = fpu_sb_trace;
extras_fpu_vfpr_out = fpu_vfpr_trace;
end
end

Expand Down Expand Up @@ -964,6 +968,13 @@ module snitch_cc #(
$fwrite(f, trace_entry);
end

if (extras_fpu_vfpr_out.read || extras_fpu_vfpr_out.write) begin
$sformat(trace_entry, "%t %1d %8d 0x%h DASM(%h) #; %s\n",

Check warning on line 972 in hw/snitch_cluster/src/snitch_cc.sv

View workflow job for this annotation

GitHub Actions / verible-verilog-lint

[verible-verilog-lint] hw/snitch_cluster/src/snitch_cc.sv#L972

Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/snitch_cluster/src/snitch_cc.sv" range:{start:{line:972 column:68}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:972 column:68} end:{line:973}} text:"          $sformat(trace_entry, \"%t %1d %8d 0x%h DASM(%h) #; %s\\n\",\n"}
$time, cycle, i_snitch.priv_lvl_q, 32'hz, 64'hz,
snitch_pkg::print_fpu_vfpr_trace(extras_fpu_vfpr_out));
$fwrite(f, trace_entry);
end

end
end else begin
cycle = '0;
Expand Down
4 changes: 0 additions & 4 deletions hw/snitch_cluster/src/snitch_cluster.sv
Original file line number Diff line number Diff line change
Expand Up @@ -1002,10 +1002,6 @@ module snitch_cluster
end
end

initial begin
$display("xfrep: %b", Xfrep);
end

for (genvar i = 0; i < NrHives; i++) begin : gen_hive
localparam int unsigned HiveSize = get_hive_size(i);

Expand Down
Loading

0 comments on commit 53a0c62

Please sign in to comment.