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Modifed read and wr stages to use vfpr
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otoomey committed Mar 2, 2024
1 parent 9bc5e83 commit aaa64ec
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Showing 7 changed files with 201 additions and 222 deletions.
1 change: 1 addition & 0 deletions .vscode/lint.py
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Expand Up @@ -18,6 +18,7 @@
out = e.output.decode('ascii')

out = re.sub(r'%.*\/\.bender\/[^%]*', '', out)
# print(out)

if len(sys.argv) > 1:
pat = f'%.*{sys.argv[1]}[^%]*'
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128 changes: 64 additions & 64 deletions .vscode/linter.vc

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1 change: 0 additions & 1 deletion Bender.yml
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Expand Up @@ -255,7 +255,6 @@ sources:
- hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv
- hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral.sv
- hw/snitch_cluster/src/snitch_fpu.sv
- hw/snitch_cluster/src/stream_reduce.sv
- hw/snitch_cluster/src/stream_stall.sv
- hw/snitch_cluster/src/stream_merge.sv
- hw/snitch_cluster/src/snitch_tcdm_router.sv
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4 changes: 2 additions & 2 deletions hw/snitch_cluster/src/snitch_cc.sv
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Expand Up @@ -520,8 +520,8 @@ module snitch_cc #(
.acc_resp_ready_i ( acc_pready ),
.data_req_o ( fpu_dreq ),
.data_rsp_i ( fpu_drsp ),
.data_req_i ( tcdm_req_i ),
.data_rsp_o ( tcdm_rsp_o ),
.tcdm_req_i ( tcdm_req_i ),
.tcdm_rsp_o ( tcdm_rsp_o ),
.mem_req_o ( mem_req_o ),
.mem_rsp_i ( mem_rsp_i ),
.fpu_rnd_mode_i ( fpu_rnd_mode ),
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