Updated interconnect and added handshake signals #3
reviewdog [verible-verilog-lint] report
reported by reviewdog 🐶
Findings (45)
hw/stitch_cluster/src/stitch_sb.sv|44 col 17| Use blocking assignments, at most, for locals inside 'always_ff' sequential blocks. [Style: sequential-logic] [always-ff-non-blocking]
hw/stitch_cluster/src/stitch_sb.sv|51 col 47| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/stitch_cluster/src/stitch_sb.sv|52 col 44| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/stitch_cluster/src/stitch_sb.sv|58 col 47| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/stitch_cluster/src/stitch_decoder.sv|11 col 47| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_decoder.sv|65 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_decoder.sv|2148 col 101| Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
hw/stitch_cluster/src/stitch_decoder.sv|2149 col 101| Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
hw/stitch_cluster/src/stitch_decoder.sv|2150 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/stitch_cluster/src/stitch_decoder.sv|2151 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/stitch_cluster/src/stitch_decoder.sv|2171 col 11| File must end with a newline. [Style: posix-file-endings] [posix-eof]
hw/stitch_cluster/src/stitch_sb_ipool.sv|4 col 27| Explicitly define a storage type for every parameter and localparam, (ResetState). [Style: constants] [explicit-parameter-storage-type]
hw/stitch_cluster/src/stitch_sb_ipool.sv|4 col 39| Unpacked dimension range must be declared in big-endian ([0:N-1]) order. Declare zero-based big-endian unpacked dimensions sized as [N]. [Style: unpacked-ordering] [unpacked-dimensions-range-ordering]
hw/stitch_cluster/src/stitch_sb_ipool.sv|108 col 40| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/stitch_cluster/src/stitch_sb_ipool.sv|117 col 10| File must end with a newline. [Style: posix-file-endings] [posix-eof]
hw/snitch_cluster/src/snitch_cc.sv|514 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|5 col 26| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|91 col 51| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|112 col 31| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|135 col 43| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|154 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|159 col 36| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/stitch_cluster/src/stitch_fp_ss.sv|165 col 21| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/stitch_cluster/src/stitch_fp_ss.sv|179 col 13| Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
hw/stitch_cluster/src/stitch_fp_ss.sv|199 col 53| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|258 col 36| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/stitch_cluster/src/stitch_fp_ss.sv|293 col 30| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|294 col 30| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|295 col 30| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|325 col 53| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|343 col 33| Do not use consecutive null statements like ';;'. [Style: redundant-semicolons] [forbid-consecutive-null-statements]
hw/stitch_cluster/src/stitch_fp_ss.sv|529 col 58| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_fp_ss.sv|588 col 78| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_sequencer.sv|213 col 101| Line length exceeds max: 100; is: 115 [Style: line-length] [line-length]
hw/stitch_cluster/src/stitch_sequencer.sv|214 col 101| Line length exceeds max: 100; is: 118 [Style: line-length] [line-length]
hw/mem_interface/src/mem_cascade_shifter.sv|22 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/mem_interface/src/mem_cascade_shifter.sv|48 col 44| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/mem_interface/src/mem_cascade_shifter.sv|54 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/mem_interface/src/mem_cascade_shifter.sv|68 col 11| File must end with a newline. [Style: posix-file-endings] [posix-eof]
hw/stitch_cluster/src/stitch_vfpr.sv|62 col 36| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/stitch_cluster/src/stitch_vfpr.sv|119 col 36| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/stitch_cluster/src/stitch_vfpr.sv|161 col 28| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/stitch_cluster/src/stitch_vfpr.sv|175 col 10| File must end with a newline. [Style: posix-file-endings] [posix-eof]
hw/snitch_cluster/src/snitch_cluster.sv|703 col 14| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/stitch_cluster/src/stream_reduce.sv|16 col 10| File must end with a newline. [Style: posix-file-endings] [posix-eof]
Filtered Findings (0)
Annotations
Check warning on line 44 in hw/stitch_cluster/src/stitch_sb.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_sb.sv#L44
Use blocking assignments, at most, for locals inside 'always_ff' sequential blocks. [Style: sequential-logic] [always-ff-non-blocking]
Raw output
message:"Use blocking assignments, at most, for locals inside 'always_ff' sequential blocks. [Style: sequential-logic] [always-ff-non-blocking]" location:{path:"./hw/stitch_cluster/src/stitch_sb.sv" range:{start:{line:44 column:17}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 51 in hw/stitch_cluster/src/stitch_sb.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_sb.sv#L51
All generate block statements must have a label [Style: generate-statements] [generate-label]
Raw output
message:"All generate block statements must have a label [Style: generate-statements] [generate-label]" location:{path:"./hw/stitch_cluster/src/stitch_sb.sv" range:{start:{line:51 column:47}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 52 in hw/stitch_cluster/src/stitch_sb.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_sb.sv#L52
All generate block statements must have a label [Style: generate-statements] [generate-label]
Raw output
message:"All generate block statements must have a label [Style: generate-statements] [generate-label]" location:{path:"./hw/stitch_cluster/src/stitch_sb.sv" range:{start:{line:52 column:44}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 58 in hw/stitch_cluster/src/stitch_sb.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_sb.sv#L58
All generate block statements must have a label [Style: generate-statements] [generate-label]
Raw output
message:"All generate block statements must have a label [Style: generate-statements] [generate-label]" location:{path:"./hw/stitch_cluster/src/stitch_sb.sv" range:{start:{line:58 column:47}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 11 in hw/stitch_cluster/src/stitch_decoder.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_decoder.sv#L11
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/stitch_cluster/src/stitch_decoder.sv" range:{start:{line:11 column:47}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:11 column:47} end:{line:12}} text:" output fpnew_pkg::fp_format_e src_fmt_o,\n"}
Check warning on line 65 in hw/stitch_cluster/src/stitch_decoder.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_decoder.sv#L65
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/stitch_cluster/src/stitch_decoder.sv" range:{start:{line:65 column:1}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:65 column:1} end:{line:66}} text:"\n"}
Check warning on line 2148 in hw/stitch_cluster/src/stitch_decoder.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_decoder.sv#L2148
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]" location:{path:"./hw/stitch_cluster/src/stitch_decoder.sv" range:{start:{line:2148 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 2149 in hw/stitch_cluster/src/stitch_decoder.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_decoder.sv#L2149
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]" location:{path:"./hw/stitch_cluster/src/stitch_decoder.sv" range:{start:{line:2149 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 2150 in hw/stitch_cluster/src/stitch_decoder.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_decoder.sv#L2150
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]" location:{path:"./hw/stitch_cluster/src/stitch_decoder.sv" range:{start:{line:2150 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 2151 in hw/stitch_cluster/src/stitch_decoder.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_decoder.sv#L2151
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]" location:{path:"./hw/stitch_cluster/src/stitch_decoder.sv" range:{start:{line:2151 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 2171 in hw/stitch_cluster/src/stitch_decoder.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_decoder.sv#L2171
File must end with a newline. [Style: posix-file-endings] [posix-eof]
Raw output
message:"File must end with a newline. [Style: posix-file-endings] [posix-eof]" location:{path:"./hw/stitch_cluster/src/stitch_decoder.sv" range:{start:{line:2171 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:2171 column:11} end:{line:2172}} text:"endmodule;\n"}
Check warning on line 4 in hw/stitch_cluster/src/stitch_sb_ipool.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_sb_ipool.sv#L4
Explicitly define a storage type for every parameter and localparam, (ResetState). [Style: constants] [explicit-parameter-storage-type]
Raw output
message:"Explicitly define a storage type for every parameter and localparam, (ResetState). [Style: constants] [explicit-parameter-storage-type]" location:{path:"./hw/stitch_cluster/src/stitch_sb_ipool.sv" range:{start:{line:4 column:27}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 4 in hw/stitch_cluster/src/stitch_sb_ipool.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_sb_ipool.sv#L4
Unpacked dimension range must be declared in big-endian ([0:N-1]) order. Declare zero-based big-endian unpacked dimensions sized as [N]. [Style: unpacked-ordering] [unpacked-dimensions-range-ordering]
Raw output
message:"Unpacked dimension range must be declared in big-endian ([0:N-1]) order. Declare zero-based big-endian unpacked dimensions sized as [N]. [Style: unpacked-ordering] [unpacked-dimensions-range-ordering]" location:{path:"./hw/stitch_cluster/src/stitch_sb_ipool.sv" range:{start:{line:4 column:39}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 108 in hw/stitch_cluster/src/stitch_sb_ipool.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_sb_ipool.sv#L108
All generate block statements must have a label [Style: generate-statements] [generate-label]
Raw output
message:"All generate block statements must have a label [Style: generate-statements] [generate-label]" location:{path:"./hw/stitch_cluster/src/stitch_sb_ipool.sv" range:{start:{line:108 column:40}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 117 in hw/stitch_cluster/src/stitch_sb_ipool.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_sb_ipool.sv#L117
File must end with a newline. [Style: posix-file-endings] [posix-eof]
Raw output
message:"File must end with a newline. [Style: posix-file-endings] [posix-eof]" location:{path:"./hw/stitch_cluster/src/stitch_sb_ipool.sv" range:{start:{line:117 column:10}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:117 column:10} end:{line:118}} text:"endmodule\n"}
Check warning on line 514 in hw/snitch_cluster/src/snitch_cc.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_cc.sv#L514
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/snitch_cluster/src/snitch_cc.sv" range:{start:{line:514 column:1}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:514 column:1} end:{line:515}} text:"\n"}
Check warning on line 5 in hw/stitch_cluster/src/stitch_fp_ss.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_fp_ss.sv#L5
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/stitch_cluster/src/stitch_fp_ss.sv" range:{start:{line:5 column:26}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:5 column:26} end:{line:6}} text:"// initialises a wide FPU\n"}
Check warning on line 91 in hw/stitch_cluster/src/stitch_fp_ss.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_fp_ss.sv#L91
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/stitch_cluster/src/stitch_fp_ss.sv" range:{start:{line:91 column:51}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:91 column:51} end:{line:92}} text:" logic wr_sb_index_valid;\n"}
Check warning on line 112 in hw/stitch_cluster/src/stitch_fp_ss.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_fp_ss.sv#L112
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/stitch_cluster/src/stitch_fp_ss.sv" range:{start:{line:112 column:31}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:112 column:31} end:{line:113}} text:" ) i_stitch_fpu_sequencer (\n"}
Check warning on line 135 in hw/stitch_cluster/src/stitch_fp_ss.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_fp_ss.sv#L135
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/stitch_cluster/src/stitch_fp_ss.sv" range:{start:{line:135 column:43}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:135 column:43} end:{line:136}} text:" .oup_inc_offset_o (seq_stride_inc)\n"}
Check warning on line 154 in hw/stitch_cluster/src/stitch_fp_ss.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_fp_ss.sv#L154
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/stitch_cluster/src/stitch_fp_ss.sv" range:{start:{line:154 column:1}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:154 column:1} end:{line:155}} text:"\n"}
Check warning on line 159 in hw/stitch_cluster/src/stitch_fp_ss.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_fp_ss.sv#L159
All generate block statements must have a label [Style: generate-statements] [generate-label]
Raw output
message:"All generate block statements must have a label [Style: generate-statements] [generate-label]" location:{path:"./hw/stitch_cluster/src/stitch_fp_ss.sv" range:{start:{line:159 column:36}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 165 in hw/stitch_cluster/src/stitch_fp_ss.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_fp_ss.sv#L165
Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
Raw output
message:"Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]" location:{path:"./hw/stitch_cluster/src/stitch_fp_ss.sv" range:{start:{line:165 column:21}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 179 in hw/stitch_cluster/src/stitch_fp_ss.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_fp_ss.sv#L179
Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
Raw output
message:"Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]" location:{path:"./hw/stitch_cluster/src/stitch_fp_ss.sv" range:{start:{line:179 column:13}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 199 in hw/stitch_cluster/src/stitch_fp_ss.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/stitch_cluster/src/stitch_fp_ss.sv#L199
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/stitch_cluster/src/stitch_fp_ss.sv" range:{start:{line:199 column:53}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:199 column:53} end:{line:200}} text:" fpnew_pkg::fp_format_e src_fmt;\n"}