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WIP: start payload through DRTM #521
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Commits on Aug 15, 2022
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cpu/amd/pi: add skeleton for DRTM
Signed-off-by: Krystian Hebel <[email protected]>
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Commits on Aug 31, 2022
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cpu/amd/pi/skinit: load and start DRTM payload
Signed-off-by: Krystian Hebel <[email protected]>
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Commits on Sep 9, 2022
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cpu/amd/skinit.c: pass minimal set of info required to boot to SKL
Signed-off-by: Krystian Hebel <[email protected]>
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Commits on Sep 16, 2022
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LAPIC timer can be re-configured and used by OS. TSC should have constant rate, and even if it doesn't, TSC is only read. LAPIC on the other hand requires writes during initialization, which can mess up whatever OS uses it for. Signed-off-by: Krystian Hebel <[email protected]>
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cpu/amd/skinit: print MSRs connected with SMM
Signed-off-by: Krystian Hebel <[email protected]>
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amd/pi/00730F01: make changes required to start SMM in TSEG
Signed-off-by: Krystian Hebel <[email protected]>
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mb/pcengines/apu2: changes required for SMMSTORE
Signed-off-by: Krystian Hebel <[email protected]>
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mb/pcengines/apu2: make SMMSTORE bigger
Signed-off-by: Krystian Hebel <[email protected]>
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mb/pcengines/apu2/bios_knobs.c: always enable IOMMU with DRTM payload
Signed-off-by: Krystian Hebel <[email protected]>
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Commits on Sep 18, 2022
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configs/config.pcengines_apu2_drtm_payload: add file
Signed-off-by: Krystian Hebel <[email protected]>
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Commits on Sep 30, 2022
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configs/config.pcengines_apu2_drtm_payload: enable UEFI shell, reduce…
… log level Signed-off-by: Krystian Hebel <[email protected]>
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