[MLIR] Omit version comment by default

phanrahan · Aug 30, 2023 · 011ee97 · 011ee97
1 parent 4592ee0
commit 011ee97
Show file tree

Hide file tree

Showing 169 changed files with 89 additions and 173 deletions.
diff --git a/magma/backend/mlir/compile_to_mlir_opts.py b/magma/backend/mlir/compile_to_mlir_opts.py
@@ -19,4 +19,4 @@ class CompileToMlirOpts:
     disallow_expression_inlining_in_ports: bool = False
     disallow_local_variables: bool = False
     split_verilog: bool = False
-    omit_version_comment: bool = False
+    omit_version_comment: bool = True
diff --git a/tests/test_backend/test_mlir/golds/aggregate_constant.mlir b/tests/test_backend/test_mlir/golds/aggregate_constant.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @aggregate_constant() -> (y: !hw.struct<x: i8, y: i4>) {
         %0 = hw.constant 0 : i8
         %1 = hw.constant 0 : i4

diff --git a/tests/test_backend/test_mlir/golds/aggregate_constant.v b/tests/test_backend/test_mlir/golds/aggregate_constant.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module aggregate_constant(
   output struct packed {logic [7:0] x; logic [3:0] y; } y
 );

diff --git a/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper.mlir b/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @aggregate_mux_wrapper(%a: !hw.struct<x: i8, y: i1>, %s: i1) -> (y: !hw.struct<x: i8, y: i1>) {
         %0 = hw.struct_extract %a["x"] : !hw.struct<x: i8, y: i1>
         %2 = hw.constant -1 : i8

diff --git a/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper.v b/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module aggregate_mux_wrapper(
   input  struct packed {logic [7:0] x; logic y; } a,
   input                                           s,

diff --git a/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper_extend_non_power_of_two_muxes.mlir b/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper_extend_non_power_of_two_muxes.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @aggregate_mux_wrapper(%a: !hw.struct<x: i8, y: i1>, %s: i1) -> (y: !hw.struct<x: i8, y: i1>) {
         %0 = hw.struct_extract %a["x"] : !hw.struct<x: i8, y: i1>
         %2 = hw.constant -1 : i8

diff --git a/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper_extend_non_power_of_two_muxes.v b/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper_extend_non_power_of_two_muxes.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module aggregate_mux_wrapper(
   input  struct packed {logic [7:0] x; logic y; } a,
   input                                           s,

diff --git a/...st_mlir/golds/aggregate_mux_wrapper_extend_non_power_of_two_muxes_flatten_all_tuples.mlir b/...st_mlir/golds/aggregate_mux_wrapper_extend_non_power_of_two_muxes_flatten_all_tuples.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @aggregate_mux_wrapper(%a_x: i8, %a_y: i1, %s: i1) -> (y_x: i8, y_y: i1) {
         %1 = hw.constant -1 : i8
         %0 = comb.xor %1, %a_x : i8

diff --git a/.../test_mlir/golds/aggregate_mux_wrapper_extend_non_power_of_two_muxes_flatten_all_tuples.v b/.../test_mlir/golds/aggregate_mux_wrapper_extend_non_power_of_two_muxes_flatten_all_tuples.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module aggregate_mux_wrapper(
   input  [7:0] a_x,
   input        a_y,

diff --git a/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper_flatten_all_tuples.mlir b/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper_flatten_all_tuples.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @aggregate_mux_wrapper(%a_x: i8, %a_y: i1, %s: i1) -> (y_x: i8, y_y: i1) {
         %1 = hw.constant -1 : i8
         %0 = comb.xor %1, %a_x : i8

diff --git a/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper_flatten_all_tuples.v b/tests/test_backend/test_mlir/golds/aggregate_mux_wrapper_flatten_all_tuples.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module aggregate_mux_wrapper(
   input  [7:0] a_x,
   input        a_y,

diff --git a/tests/test_backend/test_mlir/golds/complex_aggregates_nested_array.mlir b/tests/test_backend/test_mlir/golds/complex_aggregates_nested_array.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_aggregates_nested_array(%a: !hw.array<2x!hw.array<3xi4>>) -> (y: !hw.array<2x!hw.array<3xi4>>) {
         %1 = hw.constant 0 : i1
         %0 = hw.array_get %a[%1] : !hw.array<2x!hw.array<3xi4>>, i1

diff --git a/tests/test_backend/test_mlir/golds/complex_aggregates_nested_array.v b/tests/test_backend/test_mlir/golds/complex_aggregates_nested_array.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_aggregates_nested_array(
   input  [1:0][2:0][3:0] a,
   output [1:0][2:0][3:0] y

diff --git a/tests/test_backend/test_mlir/golds/complex_bind.mlir b/tests/test_backend/test_mlir/golds/complex_bind.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_bind_asserts(%I: !hw.struct<I: i1>, %O: i1, %CLK: i1, %I0: i1) -> () {
         %0 = hw.struct_extract %I["I"] : !hw.struct<I: i1>
         sv.verbatim "assert property (@(posedge CLK) {{1}} |-> ##1 {{0}});assert property ({{1}} |-> {{2}};" (%O, %0, %I0) : i1, i1, i1

diff --git a/tests/test_backend/test_mlir/golds/complex_bind.v b/tests/test_backend/test_mlir/golds/complex_bind.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_bind_asserts(
   input struct packed {logic I; } I,
   input                           O,
@@ -26,7 +25,6 @@ endmodule
 
 // ----- 8< ----- FILE "bindfile.sv" ----- 8< -----
 
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 bind complex_bind complex_bind_asserts complex_bind_asserts_inst (
   .I   (I),
   .O   (Register_inst0),

diff --git a/tests/test_backend/test_mlir/golds/complex_bind_flatten_all_tuples.mlir b/tests/test_backend/test_mlir/golds/complex_bind_flatten_all_tuples.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_bind_asserts(%I_I: i1, %O: i1, %CLK: i1, %I0: i1) -> () {
         sv.verbatim "assert property (@(posedge CLK) {{1}} |-> ##1 {{0}});assert property ({{1}} |-> {{2}};" (%O, %I_I, %I0) : i1, i1, i1
     }

diff --git a/tests/test_backend/test_mlir/golds/complex_bind_flatten_all_tuples.v b/tests/test_backend/test_mlir/golds/complex_bind_flatten_all_tuples.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_bind_asserts(
   input I_I,
         O,
@@ -26,7 +25,6 @@ endmodule
 
 // ----- 8< ----- FILE "bindfile.sv" ----- 8< -----
 
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 bind complex_bind complex_bind_asserts complex_bind_asserts_inst (
   .I_I (I_I),
   .O   (Register_inst0),

diff --git a/tests/test_backend/test_mlir/golds/complex_inline_verilog.mlir b/tests/test_backend/test_mlir/golds/complex_inline_verilog.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_inline_verilog(%I: i12, %CLK: i1) -> (O: i12) {
         %1 = sv.reg name "Register_inst0" : !hw.inout<i12>
         sv.alwaysff(posedge %CLK) {

diff --git a/tests/test_backend/test_mlir/golds/complex_inline_verilog.v b/tests/test_backend/test_mlir/golds/complex_inline_verilog.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_inline_verilog(
   input  [11:0] I,
   input         CLK,

diff --git a/tests/test_backend/test_mlir/golds/complex_inline_verilog2.mlir b/tests/test_backend/test_mlir/golds/complex_inline_verilog2.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_inline_verilog2(%I: i12, %CLK: i1) -> (O: i12) {
         %1 = sv.reg name "Register_inst0" : !hw.inout<i12>
         sv.alwaysff(posedge %CLK) {

diff --git a/tests/test_backend/test_mlir/golds/complex_inline_verilog2.v b/tests/test_backend/test_mlir/golds/complex_inline_verilog2.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_inline_verilog2(
   input  [11:0] I,
   input         CLK,

diff --git a/tests/test_backend/test_mlir/golds/complex_lut.mlir b/tests/test_backend/test_mlir/golds/complex_lut.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @LUT(%I: i2) -> (O: !hw.array<2x!hw.struct<x: i8, y: i1>>) {
         %1 = hw.constant 0 : i1
         %2 = hw.constant 1 : i1

diff --git a/tests/test_backend/test_mlir/golds/complex_lut.v b/tests/test_backend/test_mlir/golds/complex_lut.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module LUT(
   input  [1:0]                                         I,
   output struct packed {logic [7:0] x; logic y; }[1:0] O

diff --git a/tests/test_backend/test_mlir/golds/complex_magma_protocol.mlir b/tests/test_backend/test_mlir/golds/complex_magma_protocol.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @simple_magma_protocol(%I: i8) -> (O: i8) {
         hw.output %I : i8
     }

diff --git a/tests/test_backend/test_mlir/golds/complex_magma_protocol.v b/tests/test_backend/test_mlir/golds/complex_magma_protocol.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module simple_magma_protocol(
   input  [7:0] I,
   output [7:0] O

diff --git a/tests/test_backend/test_mlir/golds/complex_mixed_direction_ports.mlir b/tests/test_backend/test_mlir/golds/complex_mixed_direction_ports.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_mixed_direction_ports(%a_0_x: i8, %a_1_x: i8, %a_2_x: i8, %a_3_x: i8, %a_4_x: i8, %a_5_x: i8, %a_6_x: i8, %a_7_x: i8, %b_y: i8) -> (a_0_y: i8, a_1_y: i8, a_2_y: i8, a_3_y: i8, a_4_y: i8, a_5_y: i8, a_6_y: i8, a_7_y: i8, b_x: i8) {
         %0 = hw.constant 0 : i8
         %1 = hw.constant 0 : i8

diff --git a/tests/test_backend/test_mlir/golds/complex_mixed_direction_ports.v b/tests/test_backend/test_mlir/golds/complex_mixed_direction_ports.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_mixed_direction_ports(
   input  [7:0] a_0_x,
                a_1_x,

diff --git a/tests/test_backend/test_mlir/golds/complex_mixed_direction_ports2.mlir b/tests/test_backend/test_mlir/golds/complex_mixed_direction_ports2.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @simple_mixed_direction_ports(%a_x: i8) -> (a_y: i8) {
         hw.output %a_x : i8
     }

diff --git a/tests/test_backend/test_mlir/golds/complex_mixed_direction_ports2.v b/tests/test_backend/test_mlir/golds/complex_mixed_direction_ports2.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module simple_mixed_direction_ports(
   input  [7:0] a_x,
   output [7:0] a_y

diff --git a/tests/test_backend/test_mlir/golds/complex_register_wrapper.mlir b/tests/test_backend/test_mlir/golds/complex_register_wrapper.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_register_wrapper(%a: !hw.struct<x: i8, y: i1>, %b: !hw.array<6xi16>, %CLK: i1, %CE: i1, %ASYNCRESET: i1) -> (y: !hw.struct<u: !hw.struct<x: i8, y: i1>, v: !hw.array<6xi16>>) {
         %1 = sv.reg name "Register_inst0" : !hw.inout<!hw.struct<x: i8, y: i1>>
         sv.alwaysff(posedge %CLK) {

diff --git a/tests/test_backend/test_mlir/golds/complex_register_wrapper.v b/tests/test_backend/test_mlir/golds/complex_register_wrapper.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_register_wrapper(
   input  struct packed {logic [7:0] x; logic y; }                                          a,
   input  [5:0][15:0]                                                                       b,

diff --git a/tests/test_backend/test_mlir/golds/complex_register_wrapper_disable_initial_blocks.mlir b/tests/test_backend/test_mlir/golds/complex_register_wrapper_disable_initial_blocks.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_register_wrapper(%a: !hw.struct<x: i8, y: i1>, %b: !hw.array<6xi16>, %CLK: i1, %CE: i1, %ASYNCRESET: i1) -> (y: !hw.struct<u: !hw.struct<x: i8, y: i1>, v: !hw.array<6xi16>>) {
         %1 = sv.reg name "Register_inst0" : !hw.inout<!hw.struct<x: i8, y: i1>>
         sv.alwaysff(posedge %CLK) {

diff --git a/tests/test_backend/test_mlir/golds/complex_register_wrapper_disable_initial_blocks.v b/tests/test_backend/test_mlir/golds/complex_register_wrapper_disable_initial_blocks.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_register_wrapper(
   input  struct packed {logic [7:0] x; logic y; }                                          a,
   input  [5:0][15:0]                                                                       b,

diff --git a/tests/test_backend/test_mlir/golds/complex_register_wrapper_elaborate_magma_registers.mlir b/tests/test_backend/test_mlir/golds/complex_register_wrapper_elaborate_magma_registers.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @Register(%I: !hw.struct<x: i8, y: i1>, %CE: i1, %CLK: i1, %ASYNCRESET: i1) -> (O: !hw.struct<x: i8, y: i1>) {
         %1 = comb.extract %0 from 1 : (i9) -> i1
         %2 = comb.extract %0 from 2 : (i9) -> i1

diff --git a/tests/test_backend/test_mlir/golds/complex_register_wrapper_elaborate_magma_registers.v b/tests/test_backend/test_mlir/golds/complex_register_wrapper_elaborate_magma_registers.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module Register(
   input  struct packed {logic [7:0] x; logic y; } I,
   input                                           CE,

diff --git a/tests/test_backend/test_mlir/golds/complex_register_wrapper_flatten_all_tuples.mlir b/tests/test_backend/test_mlir/golds/complex_register_wrapper_flatten_all_tuples.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_register_wrapper(%a_x: i8, %a_y: i1, %b: !hw.array<6xi16>, %CLK: i1, %CE: i1, %ASYNCRESET: i1) -> (y_u_x: i8, y_u_y: i1, y_v: !hw.array<6xi16>) {
         %2 = sv.reg name "Register_inst0" : !hw.inout<i8>
         sv.alwaysff(posedge %CLK) {

diff --git a/tests/test_backend/test_mlir/golds/complex_register_wrapper_flatten_all_tuples.v b/tests/test_backend/test_mlir/golds/complex_register_wrapper_flatten_all_tuples.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_register_wrapper(
   input  [7:0]       a_x,
   input              a_y,

diff --git a/tests/test_backend/test_mlir/golds/complex_undriven.mlir b/tests/test_backend/test_mlir/golds/complex_undriven.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_undriven() -> (O: !hw.struct<x: i8, y: i1>) {
         %1 = sv.wire sym @complex_undriven.undriven_inst0 : !hw.inout<i8>
         %0 = sv.read_inout %1 : !hw.inout<i8>

diff --git a/tests/test_backend/test_mlir/golds/complex_undriven.v b/tests/test_backend/test_mlir/golds/complex_undriven.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_undriven(
   output struct packed {logic [7:0] x; logic y; } O
 );

diff --git a/tests/test_backend/test_mlir/golds/complex_wire.mlir b/tests/test_backend/test_mlir/golds/complex_wire.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @complex_wire(%I0: i8, %I1: i1, %I2: !hw.array<4xi8>) -> (O0: i8, O1: i1, O2: !hw.array<4xi8>) {
         %1 = sv.wire sym @complex_wire.tmp0 name "tmp0" : !hw.inout<i8>
         sv.assign %1, %I0 : i8

diff --git a/tests/test_backend/test_mlir/golds/complex_wire.v b/tests/test_backend/test_mlir/golds/complex_wire.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module complex_wire(
   input  [7:0]      I0,
   input             I1,

diff --git a/tests/test_backend/test_mlir/golds/counter.mlir b/tests/test_backend/test_mlir/golds/counter.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @counter(%CLK: i1) -> (y: i16) {
         %0 = hw.constant 1 : i16
         %2 = comb.add %1, %0 : i16

diff --git a/tests/test_backend/test_mlir/golds/counter.v b/tests/test_backend/test_mlir/golds/counter.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module counter(
   input         CLK,
   output [15:0] y

diff --git a/tests/test_backend/test_mlir/golds/feedthrough.mlir b/tests/test_backend/test_mlir/golds/feedthrough.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @feedthrough(%I: i1) -> (O: i1) {
         hw.output %I : i1
     }

diff --git a/tests/test_backend/test_mlir/golds/feedthrough.v b/tests/test_backend/test_mlir/golds/feedthrough.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module feedthrough(
   input  I,
   output O

diff --git a/tests/test_backend/test_mlir/golds/multiport_memory.mlir b/tests/test_backend/test_mlir/golds/multiport_memory.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @multiport_memory(%raddr_0: i2, %raddr_1: i2, %waddr_0: i2, %wdata_0: i5, %we_0: i1, %waddr_1: i2, %wdata_1: i5, %we_1: i1, %clk: i1) -> (rdata_0: i5, rdata_1: i5) {
         %2 = sv.reg name "MultiportMemory_inst0" : !hw.inout<!hw.array<4xi5>>
         %3 = sv.array_index_inout %2[%raddr_0] : !hw.inout<!hw.array<4xi5>>, i2

diff --git a/tests/test_backend/test_mlir/golds/multiport_memory.v b/tests/test_backend/test_mlir/golds/multiport_memory.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module multiport_memory(
   input  [1:0] raddr_0,
                raddr_1,

diff --git a/tests/test_backend/test_mlir/golds/multiport_memory_re.mlir b/tests/test_backend/test_mlir/golds/multiport_memory_re.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @multiport_memory_re(%raddr_0: i2, %raddr_1: i2, %waddr_0: i2, %wdata_0: i5, %we_0: i1, %waddr_1: i2, %wdata_1: i5, %we_1: i1, %clk: i1, %re_0: i1, %re_1: i1) -> (rdata_0: i5, rdata_1: i5) {
         %2 = sv.reg name "MultiportMemory_inst0" : !hw.inout<!hw.array<4xi5>>
         %3 = sv.array_index_inout %2[%raddr_0] : !hw.inout<!hw.array<4xi5>>, i2

diff --git a/tests/test_backend/test_mlir/golds/multiport_memory_re.v b/tests/test_backend/test_mlir/golds/multiport_memory_re.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module multiport_memory_re(
   input  [1:0] raddr_0,
                raddr_1,

diff --git a/tests/test_backend/test_mlir/golds/no_outputs.mlir b/tests/test_backend/test_mlir/golds/no_outputs.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @no_outputs(%I: i1) -> () {
         %1 = hw.constant -1 : i1
         %0 = comb.xor %1, %I : i1

diff --git a/tests/test_backend/test_mlir/golds/no_outputs.v b/tests/test_backend/test_mlir/golds/no_outputs.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module no_outputs(
   input I
 );

diff --git a/tests/test_backend/test_mlir/golds/non_power_of_two_mux_wrapper.mlir b/tests/test_backend/test_mlir/golds/non_power_of_two_mux_wrapper.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @non_power_of_two_mux_wrapper(%a: !hw.struct<x: i8, y: i1>, %s: i4) -> (y: !hw.struct<x: i8, y: i1>) {
         %0 = hw.struct_extract %a["x"] : !hw.struct<x: i8, y: i1>
         %2 = hw.constant -1 : i8

diff --git a/tests/test_backend/test_mlir/golds/non_power_of_two_mux_wrapper.v b/tests/test_backend/test_mlir/golds/non_power_of_two_mux_wrapper.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module non_power_of_two_mux_wrapper(
   input  struct packed {logic [7:0] x; logic y; } a,
   input  [3:0]                                    s,

diff --git a/...t_backend/test_mlir/golds/non_power_of_two_mux_wrapper_extend_non_power_of_two_muxes.mlir b/...t_backend/test_mlir/golds/non_power_of_two_mux_wrapper_extend_non_power_of_two_muxes.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @non_power_of_two_mux_wrapper(%a: !hw.struct<x: i8, y: i1>, %s: i4) -> (y: !hw.struct<x: i8, y: i1>) {
         %0 = hw.struct_extract %a["x"] : !hw.struct<x: i8, y: i1>
         %2 = hw.constant -1 : i8

diff --git a/...test_backend/test_mlir/golds/non_power_of_two_mux_wrapper_extend_non_power_of_two_muxes.v b/...test_backend/test_mlir/golds/non_power_of_two_mux_wrapper_extend_non_power_of_two_muxes.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module non_power_of_two_mux_wrapper(
   input  struct packed {logic [7:0] x; logic y; } a,
   input  [3:0]                                    s,

diff --git a/.../golds/non_power_of_two_mux_wrapper_extend_non_power_of_two_muxes_flatten_all_tuples.mlir b/.../golds/non_power_of_two_mux_wrapper_extend_non_power_of_two_muxes_flatten_all_tuples.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @non_power_of_two_mux_wrapper(%a_x: i8, %a_y: i1, %s: i4) -> (y_x: i8, y_y: i1) {
         %1 = hw.constant -1 : i8
         %0 = comb.xor %1, %a_x : i8

diff --git a/...lir/golds/non_power_of_two_mux_wrapper_extend_non_power_of_two_muxes_flatten_all_tuples.v b/...lir/golds/non_power_of_two_mux_wrapper_extend_non_power_of_two_muxes_flatten_all_tuples.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module non_power_of_two_mux_wrapper(
   input  [7:0] a_x,
   input        a_y,

diff --git a/tests/test_backend/test_mlir/golds/register_array_of_bit.mlir b/tests/test_backend/test_mlir/golds/register_array_of_bit.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @register_array_of_bit(%I: i4, %CLK: i1) -> (O: i4) {
         %1 = sv.reg name "Register_inst0" : !hw.inout<i4>
         sv.alwaysff(posedge %CLK) {

diff --git a/tests/test_backend/test_mlir/golds/register_array_of_bit.v b/tests/test_backend/test_mlir/golds/register_array_of_bit.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module register_array_of_bit(
   input  [3:0] I,
   input        CLK,

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_anon_product.mlir b/tests/test_backend/test_mlir/golds/simple_aggregates_anon_product.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @simple_aggregates_anon_product(%a: !hw.struct<x: i8, y: i8>) -> (y: !hw.struct<x: i8, y: i8>) {
         %0 = hw.struct_extract %a["x"] : !hw.struct<x: i8, y: i8>
         %2 = hw.constant -1 : i8

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_anon_product.v b/tests/test_backend/test_mlir/golds/simple_aggregates_anon_product.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module simple_aggregates_anon_product(
   input  struct packed {logic [7:0] x; logic [7:0] y; } a,
   output struct packed {logic [7:0] x; logic [7:0] y; } y

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_anon_product_flatten_all_tuples.mlir b/tests/test_backend/test_mlir/golds/simple_aggregates_anon_product_flatten_all_tuples.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @simple_aggregates_anon_product(%a_x: i8, %a_y: i8) -> (y_x: i8, y_y: i8) {
         %1 = hw.constant -1 : i8
         %0 = comb.xor %1, %a_x : i8

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_anon_product_flatten_all_tuples.v b/tests/test_backend/test_mlir/golds/simple_aggregates_anon_product_flatten_all_tuples.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module simple_aggregates_anon_product(
   input  [7:0] a_x,
                a_y,

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_array.mlir b/tests/test_backend/test_mlir/golds/simple_aggregates_array.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @simple_aggregates_array(%a: !hw.array<8xi16>) -> (y: !hw.array<8xi16>, z: !hw.array<4xi16>) {
         %1 = hw.constant 4 : i3
         %0 = hw.array_slice %a[%1] : (!hw.array<8xi16>) -> !hw.array<4xi16>

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_array.v b/tests/test_backend/test_mlir/golds/simple_aggregates_array.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module simple_aggregates_array(
   input  [7:0][15:0] a,
   output [7:0][15:0] y,

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_bits.mlir b/tests/test_backend/test_mlir/golds/simple_aggregates_bits.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @simple_aggregates_bits(%a: i16) -> (y: i16, z: i8) {
         %0 = comb.extract %a from 8 : (i16) -> i8
         %1 = comb.extract %a from 0 : (i16) -> i8

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_bits.v b/tests/test_backend/test_mlir/golds/simple_aggregates_bits.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module simple_aggregates_bits(
   input  [15:0] a,
   output [15:0] y,

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_nested_array.mlir b/tests/test_backend/test_mlir/golds/simple_aggregates_nested_array.mlir
@@ -1,4 +1,4 @@
-module attributes {circt.loweringOptions = "locationInfoStyle=none"} {
+module attributes {circt.loweringOptions = "locationInfoStyle=none,omitVersionComment"} {
     hw.module @simple_aggregates_nested_array(%a: !hw.array<8x!hw.array<4xi16>>) -> (y: !hw.array<8x!hw.array<4xi16>>) {
         %1 = hw.constant 4 : i3
         %0 = hw.array_slice %a[%1] : (!hw.array<8x!hw.array<4xi16>>) -> !hw.array<4x!hw.array<4xi16>>

diff --git a/tests/test_backend/test_mlir/golds/simple_aggregates_nested_array.v b/tests/test_backend/test_mlir/golds/simple_aggregates_nested_array.v
@@ -1,4 +1,3 @@
-// Generated by CIRCT firtool-1.51.0-75-gbecb4c0ef
 module simple_aggregates_nested_array(
   input  [7:0][3:0][15:0] a,
   output [7:0][3:0][15:0] y