xact_dump: xc3000.

Cargo.toml

@@ -12,6 +12,7 @@ members = [
 	"prjcombine_int",
 	"prjcombine_xilinx_naming",
 	"prjcombine_xc2000",
+	"prjcombine_xc3000",
 	"prjcombine_xc4000",
 	"prjcombine_xc5200",
 	"prjcombine_virtex",
@@ -63,6 +64,7 @@ members = [
 	"prjcombine_ise_hammer",
 	"prjcombine_xact_naming",
 	"prjcombine_xc2000_xact",
+	"prjcombine_xc3000_xact",
 	"prjcombine_xc4000_xact",
 	"prjcombine_xc5200_xact",
 	"prjcombine_xact_data",
@@ -95,6 +97,7 @@ prjcombine_rdgrid = { path = "prjcombine_rdgrid" }
 prjcombine_rdintb = { path = "prjcombine_rdintb" }
 prjcombine_rdverify = { path = "prjcombine_rdverify" }
 prjcombine_xc2000 = { path = "prjcombine_xc2000" }
+prjcombine_xc3000 = { path = "prjcombine_xc3000" }
 prjcombine_xc4000 = { path = "prjcombine_xc4000" }
 prjcombine_xc4000_naming = { path = "prjcombine_xc4000_naming" }
 prjcombine_xc4000_rdverify = { path = "prjcombine_xc4000_rdverify" }
@@ -140,6 +143,7 @@ prjcombine_hammer = { path = "prjcombine_hammer" }
 prjcombine_collector = { path = "prjcombine_collector" }
 prjcombine_xact_naming = { path = "prjcombine_xact_naming" }
 prjcombine_xc2000_xact = { path = "prjcombine_xc2000_xact" }
+prjcombine_xc3000_xact = { path = "prjcombine_xc3000_xact" }
 prjcombine_xc4000_xact = { path = "prjcombine_xc4000_xact" }
 prjcombine_xc5200_xact = { path = "prjcombine_xc5200_xact" }
 prjcombine_xact_geom = { path = "prjcombine_xact_geom" }

README.md

@@ -26,6 +26,12 @@ See https://prjunnamed.github.io/prjcombine/
 - Xilinx Coolrunner 2 CPLDs: phase 4 in progress
 - Xilinx FPGAs:
 
+  - XC2000, XC2000L: phase 1 complete
+  - XC3000, XC3100: phase 1 complete
+  - XC3000A, XC3100A, XC3000L, XC3100L: phase 1 complete
+  - XC4000, XC4000D: phase 1 complete
+  - XC4000A: phase 1 complete
+  - XC4000H: phase 1 complete
   - XC4000E, XC4000L, Spartan: phase 2 complete
   - XC4000EX, XC4000XL: phase 2 complete
   - XC4000XLA: phase 2 complete

prjcombine_xact_dump/Cargo.toml

@@ -11,6 +11,8 @@ unnamed_entity.workspace = true
 prjcombine_int.workspace = true
 prjcombine_xc2000.workspace = true
 prjcombine_xc2000_xact.workspace = true
+prjcombine_xc3000.workspace = true
+prjcombine_xc3000_xact.workspace = true
 prjcombine_xc4000.workspace = true
 prjcombine_xc4000_xact.workspace = true
 prjcombine_xc5200.workspace = true

prjcombine_xact_dump/src/extractor.rs

@@ -13,7 +13,7 @@ use prjcombine_xact_naming::{
     db::{IntPipNaming, NamingDb, NodeNamingId, NodeRawTileId, PipNaming},
     grid::ExpandedGridNaming,
 };
-use unnamed_entity::{entity_id, EntityBitVec, EntityId, EntityPartVec, EntityVec};
+use unnamed_entity::{entity_id, EntityBitVec, EntityId, EntityMap, EntityPartVec, EntityVec};
 
 entity_id! {
     pub id NetId u32, reserve 1;
@@ -119,7 +119,12 @@ impl<'a> Extractor<'a> {
             used_pips: Default::default(),
             prims_by_name_a: Default::default(),
             prims_by_name_i: Default::default(),
-            bel_pips: ngrid.db.node_namings.ids().map(|_| Default::default()).collect(),
+            bel_pips: ngrid
+                .db
+                .node_namings
+                .ids()
+                .map(|_| Default::default())
+                .collect(),
             node_muxes: EntityPartVec::new(),
             int_pips: EntityPartVec::new(),
             net_by_tile_override: Default::default(),
@@ -491,6 +496,10 @@ impl<'a> Extractor<'a> {
         }
     }
 
+    pub fn own_pip(&mut self, net_t: NetId, net_f: NetId, nloc: NodeLoc) {
+        assert_eq!(self.pip_owner.insert((net_t, net_f), nloc), None);
+    }
+
     pub fn mark_tbuf_pseudo(&mut self, net_t: NetId, net_f: NetId) {
         assert!(self.nets[net_t].pips_bwd.contains_key(&net_f));
         self.tbuf_pseudos.insert((net_t, net_f));
@@ -516,6 +525,9 @@ impl<'a> Extractor<'a> {
                 for (layer, _) in &die[(col, row)].nodes {
                     let nloc = (die.die, col, row, layer);
                     let nnode = &self.ngrid.nodes[&nloc];
+                    if nnode.coords.is_empty() {
+                        continue;
+                    }
                     let rng = nnode.coords[NodeRawTileId::from_idx(0)].clone();
 
                     for x in rng.0 {
@@ -664,12 +676,22 @@ impl<'a> Extractor<'a> {
                     if !self.node_muxes.contains_id(node.kind) {
                         self.node_muxes.insert(node.kind, muxes);
                     } else {
-                        assert_eq!(self.node_muxes[node.kind], muxes);
+                        assert_eq!(
+                            self.node_muxes[node.kind],
+                            muxes,
+                            "fail merging node {}",
+                            self.egrid.db.nodes.key(node.kind)
+                        );
                     }
                     if !self.int_pips.contains_id(nnode.naming) {
                         self.int_pips.insert(nnode.naming, int_pips);
                     } else {
-                        assert_eq!(self.int_pips[nnode.naming], int_pips);
+                        assert_eq!(
+                            self.int_pips[nnode.naming],
+                            int_pips,
+                            "fail merging node naming {}",
+                            self.ngrid.db.node_namings.key(nnode.naming)
+                        );
                     }
                 }
             }
@@ -715,12 +737,22 @@ impl<'a> Extractor<'a> {
 
 impl Finisher {
     pub fn finish(mut self, db: &mut IntDb, ndb: &mut NamingDb) {
-        for (naming, _, node_naming) in &mut ndb.node_namings {
-            node_naming.int_pips = self.int_pips.remove(naming).unwrap();
-            node_naming.bel_pips = core::mem::take(&mut self.bel_pips[naming]);
+        let mut new_node_namings = EntityMap::new();
+        for (naming, name, mut node_naming) in core::mem::take(&mut ndb.node_namings) {
+            if let Some(int_pips) = self.int_pips.remove(naming) {
+                node_naming.int_pips = int_pips;
+                node_naming.bel_pips = core::mem::take(&mut self.bel_pips[naming]);
+                new_node_namings.insert(name, node_naming);
+            }
         }
-        for (kind, _, node) in &mut db.nodes {
-            node.muxes = self.node_muxes.remove(kind).unwrap();
+        ndb.node_namings = new_node_namings;
+        let mut new_nodes = EntityMap::new();
+        for (kind, name, mut node) in core::mem::take(&mut db.nodes) {
+            if let Some(muxes) = self.node_muxes.remove(kind) {
+                node.muxes = muxes;
+                new_nodes.insert(name, node);
+            }
         }
+        db.nodes = new_nodes;
     }
 }

prjcombine_xact_dump/src/main.rs

@@ -13,6 +13,7 @@ use prjcombine_xact_geom::{Bond, Device, DeviceBond, ExpandedNamedDevice, GeomDb
 
 mod extractor;
 mod xc2000;
+mod xc3000;
 mod xc4000;
 mod xc5200;
 
@@ -62,7 +63,17 @@ fn main() {
                         let (grid, intdb, ndb) = xc2000::dump_grid(&die);
                         (Grid::Xc2000(grid), intdb, ndb)
                     }
-                    PartKind::Xc3000 => todo!(),
+                    PartKind::Xc3000 => {
+                        let (grid, intdb, ndb) = xc3000::dump_grid(
+                            &die,
+                            if args.family == "xc3000a" {
+                                prjcombine_xc3000::grid::GridKind::Xc3000A
+                            } else {
+                                prjcombine_xc3000::grid::GridKind::Xc3000
+                            },
+                        );
+                        (Grid::Xc3000(grid), intdb, ndb)
+                    }
                     PartKind::Xc4000 => {
                         let (grid, intdb, ndb) = xc4000::dump_grid(&die);
                         (Grid::Xc4000(grid), intdb, ndb)
@@ -78,16 +89,34 @@ fn main() {
                     btree_map::Entry::Vacant(entry) => {
                         entry.insert(intdb);
                     }
-                    btree_map::Entry::Occupied(entry) => {
-                        assert_eq!(*entry.get(), intdb);
+                    btree_map::Entry::Occupied(mut entry) => {
+                        let cintdb = entry.get_mut();
+                        assert_eq!(cintdb.wires, intdb.wires);
+                        assert_eq!(cintdb.terms, intdb.terms);
+                        for (_, name, node) in intdb.nodes {
+                            if let Some((_, cnode)) = cintdb.nodes.get(&name) {
+                                assert_eq!(*cnode, node, "mismatch for node {name}");
+                            } else {
+                                cintdb.nodes.insert(name, node);
+                            }
+                        }
                     }
                 }
                 match db.namings.entry(args.family.clone()) {
                     btree_map::Entry::Vacant(entry) => {
                         entry.insert(ndb);
                     }
-                    btree_map::Entry::Occupied(entry) => {
-                        assert_eq!(*entry.get(), ndb);
+                    btree_map::Entry::Occupied(mut entry) => {
+                        let cndb = entry.get_mut();
+                        assert_eq!(cndb.tile_widths, ndb.tile_widths);
+                        assert_eq!(cndb.tile_heights, ndb.tile_heights);
+                        for (_, name, node) in ndb.node_namings {
+                            if let Some((_, cnode)) = cndb.node_namings.get(&name) {
+                                assert_eq!(*cnode, node);
+                            } else {
+                                cndb.node_namings.insert(name, node);
+                            }
+                        }
                     }
                 }
                 entry.insert(grid);
@@ -134,7 +163,39 @@ fn main() {
                 }
                 Bond::Xc2000(bond)
             }
-            PartKind::Xc3000 => todo!(),
+            PartKind::Xc3000 => {
+                let ExpandedNamedDevice::Xc3000(ref endev) = endev else {
+                    unreachable!()
+                };
+                let (bond, cfg_io) = xc3000::make_bond(endev, &part.package, &pkg);
+                let pin_xtl1 = &part.kv["OSCIOB1"][0];
+                let pin_xtl2 = &part.kv["OSCIOB2"][0];
+                let io_xtl1 = bond.pins[pin_xtl1];
+                let io_xtl2 = bond.pins[pin_xtl2];
+                assert_eq!(
+                    io_xtl1,
+                    prjcombine_xc3000::bond::BondPin::Io(endev.grid.io_xtl1())
+                );
+                assert_eq!(
+                    io_xtl2,
+                    prjcombine_xc3000::bond::BondPin::Io(endev.grid.io_xtl2())
+                );
+                let pad_tclk = &part.kv["TCLKIOB"][0];
+                assert_eq!(pad_tclk, endev.get_io_name(endev.grid.io_tclk()));
+                let pad_bclk = &part.kv["BCLKIOB"][0];
+                assert_eq!(pad_bclk, endev.get_io_name(endev.grid.io_xtl2()));
+                if !cfg_io.is_empty() {
+                    let Grid::Xc3000(ref mut grid) = db.grids[grid] else {
+                        unreachable!()
+                    };
+                    if grid.cfg_io.is_empty() {
+                        grid.cfg_io = cfg_io;
+                    } else {
+                        assert_eq!(grid.cfg_io, cfg_io);
+                    }
+                }
+                Bond::Xc3000(bond)
+            }
             PartKind::Xc4000 => {
                 let ExpandedNamedDevice::Xc4000(ref endev) = endev else {
                     unreachable!()

prjcombine_xact_dump/src/xc2000.rs

@@ -113,7 +113,6 @@ pub fn make_intdb() -> IntDb {
     for name in ["GCLK", "ACLK", "IOCLK.B", "IOCLK.T", "IOCLK.L", "IOCLK.R"] {
         db.wires.insert(name.into(), WireKind::ClkOut(0));
     }
-    db.wires.insert("ACLK".into(), WireKind::ClkOut(0));
 
     for name in [
         "IMUX.CLB.A",
@@ -263,6 +262,19 @@ pub fn make_intdb() -> IntDb {
         db.nodes.insert(name.into(), node);
     }
 
+    for name in ["BIDIH", "BIDIV"] {
+        db.nodes.insert(
+            name.into(),
+            NodeKind {
+                tiles: Default::default(),
+                muxes: Default::default(),
+                iris: Default::default(),
+                intfs: Default::default(),
+                bels: Default::default(),
+            },
+        );
+    }
+
     db
 }
 
@@ -463,7 +475,7 @@ pub fn dump_grid(die: &Die) -> (Grid, IntDb, NamingDb) {
         }
     }
 
-    // horizontal single and double
+    // horizontal singles
     let mut queue = vec![];
     for col in die.cols() {
         let mut x = endev.col_x[col].end;
@@ -504,7 +516,7 @@ pub fn dump_grid(die: &Die) -> (Grid, IntDb, NamingDb) {
             }
         }
     }
-    // vertical single and double
+    // vertical singles
     for row in die.rows() {
         let mut y = endev.row_y[row].start;
         if row == grid.row_bio() {