ise_hammer: 6v IOI.

prjunnamed · Oct 3, 2024 · 999dc0c · 999dc0c
1 parent 7d631ac
commit 999dc0c
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Showing 8 changed files with 1,386 additions and 36 deletions.
diff --git a/databases/xc6v-tiledb.json b/databases/xc6v-tiledb.json
diff --git a/docs/gen_xilinx.py b/docs/gen_xilinx.py
@@ -363,6 +363,9 @@ def emit_dev_table_string(f, name):
         emit_misc_table("xilinx/gen/xc6v-iostd-dci-term-vcc.html", "IOSTD:DCI:PREF_TERM_VCC", "IOSTD:DCI:PMASK_TERM_VCC")
         emit_misc_table("xilinx/gen/xc6v-iostd-dci-term-split.html", "IOSTD:DCI:PREF_TERM_SPLIT", "IOSTD:DCI:NREF_TERM_SPLIT", "IOSTD:DCI:PMASK_TERM_SPLIT", "IOSTD:DCI:NMASK_TERM_SPLIT")
 
+        with open("xilinx/gen/xc6v-iodelay-default-idelay-value.html", "w") as f:
+            emit_dev_table_bitvec(f, "IODELAY:DEFAULT_IDELAY_VALUE")
+
         emit_misc_table("xilinx/gen/xc6v-mmcm-filter.html", "MMCM:CP", "MMCM:RES", "MMCM:LFHF")
         emit_misc_table("xilinx/gen/xc6v-mmcm-lock.html",
                         "MMCM:LOCK_REF_DLY",

diff --git a/docs/xilinx/virtex4/io.rst b/docs/xilinx/virtex4/io.rst
@@ -107,6 +107,13 @@ Row ``r + 4`` is not used as ``SYSMON`` input — the "analog function" of that
 Bitstream
 =========
 
+.. raw:: html
+   :file: ../gen/tile-xc4v-IO.html
+
+
+Tables
+======
+
 .. raw:: html
    :file: ../gen/xc4v-iostd-drive.html
 
@@ -118,6 +125,3 @@ Bitstream
 
 .. raw:: html
    :file: ../gen/xc4v-iostd-lvds.html
-
-.. raw:: html
-   :file: ../gen/tile-xc4v-IO.html
diff --git a/docs/xilinx/virtex5/io.rst b/docs/xilinx/virtex5/io.rst
@@ -148,6 +148,13 @@ The ``SYSMON`` present on the device can use up to 16 IOB pairs from the left I/
 Bitstream
 =========
 
+.. raw:: html
+   :file: ../gen/tile-xc5v-IO.html
+
+
+Tables
+======
+
 .. raw:: html
    :file: ../gen/xc5v-iostd-drive.html
 
@@ -162,6 +169,3 @@ Bitstream
 
 .. raw:: html
    :file: ../gen/xc5v-iodelay-default-idelay-value.html
-
-.. raw:: html
-   :file: ../gen/tile-xc5v-IO.html
diff --git a/docs/xilinx/virtex6/io.rst b/docs/xilinx/virtex6/io.rst
@@ -127,6 +127,20 @@ The devices also have dedicated configuration bank 0, which has no user I/O and
 Bitstream — ``IO``
 ==================
 
+.. raw:: html
+   :file: ../gen/tile-xc6v-IO.html
+
+
+Bitstream — ``HCLK_IOI``
+========================
+
+.. raw:: html
+   :file: ../gen/tile-xc6v-HCLK_IOI.html
+
+
+Tables
+======
+
 .. raw:: html
    :file: ../gen/xc6v-iostd-drive.html
 
@@ -139,13 +153,6 @@ Bitstream — ``IO``
 .. raw:: html
    :file: ../gen/xc6v-iostd-lvds.html
 
-.. raw:: html
-   :file: ../gen/tile-xc6v-IO.html
-
-
-Bitstream — ``HCLK_IOI``
-========================
-
 .. raw:: html
    :file: ../gen/xc6v-iostd-lvdsbias.html
 
@@ -162,4 +169,4 @@ Bitstream — ``HCLK_IOI``
    :file: ../gen/xc6v-iostd-dci-term-split.html
 
 .. raw:: html
-   :file: ../gen/tile-xc6v-HCLK_IOI.html
+   :file: ../gen/xc6v-iodelay-default-idelay-value.html
diff --git a/prjcombine_ise_hammer/src/clk/virtex6.rs b/prjcombine_ise_hammer/src/clk/virtex6.rs
@@ -288,6 +288,30 @@ pub fn add_fuzzers<'a>(session: &mut Session<IseBackend<'a>>, backend: &IseBacke
                 (pip (bel_pin bel_hclk_ioi, format!("HCLK{i}_O")), (pin "REFCLK"))
             ]);
         }
+        fuzz_one!(ctx, "PRESENT", "1", [], [(mode "IDELAYCTRL")]);
+        fuzz_enum!(ctx, "RESET_STYLE", ["V4", "V5"], [(mode "IDELAYCTRL")]);
+        fuzz_enum!(ctx, "HIGH_PERFORMANCE_MODE", ["FALSE", "TRUE"], [(mode "IDELAYCTRL")]);
+        fuzz_one!(ctx, "MODE", "DEFAULT", [
+            (tile_mutex "IDELAYCTRL", "TEST"),
+            (mode "IDELAYCTRL")
+        ], [
+            (attr "IDELAYCTRL_EN", "DEFAULT"),
+            (attr "BIAS_MODE", "2")
+        ]);
+        fuzz_one!(ctx, "MODE", "FULL_0", [
+            (tile_mutex "IDELAYCTRL", "TEST"),
+            (mode "IDELAYCTRL")
+        ], [
+            (attr "IDELAYCTRL_EN", "ENABLE"),
+            (attr "BIAS_MODE", "0")
+        ]);
+        fuzz_one!(ctx, "MODE", "FULL_1", [
+            (tile_mutex "IDELAYCTRL", "TEST"),
+            (mode "IDELAYCTRL")
+        ], [
+            (attr "IDELAYCTRL_EN", "ENABLE"),
+            (attr "BIAS_MODE", "1")
+        ]);
     }
     {
         let ctx = FuzzCtx::new(session, backend, "HCLK_IOI", "HCLK_IOI", TileBits::Hclk);
@@ -546,6 +570,10 @@ pub fn collect_fuzzers(ctx: &mut CollectorCtx) {
         let bel = "IDELAYCTRL";
         let vals: [_; 12] = core::array::from_fn(|i| format!("HCLK{i}"));
         ctx.collect_enum(tile, bel, "MUX.REFCLK", &vals);
+        ctx.state.get_diff(tile, bel, "PRESENT", "1").assert_empty();
+        ctx.collect_enum_bool(tile, bel, "HIGH_PERFORMANCE_MODE", "FALSE", "TRUE");
+        ctx.collect_enum_default(tile, bel, "MODE", &["DEFAULT", "FULL_0", "FULL_1"], "NONE");
+        ctx.collect_enum(tile, bel, "RESET_STYLE", &["V4", "V5"]);
     }
     {
         let tile = "HCLK_IOI";