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split NamingDb from IntDb
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@wanda-phi
wanda-phi committed Nov 17, 2024
1 parent 5b1901f commit c1cd91e
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Showing 163 changed files with 21,440 additions and 17,810 deletions.
24 changes: 21 additions & 3 deletions Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ members = [
"prjcombine_lattice_dump",
"prjcombine_lattice_rawdump",
"prjcombine_int",
"prjcombine_xilinx_naming",
"prjcombine_xc4000",
"prjcombine_xc5200",
"prjcombine_virtex",
Expand All @@ -18,6 +19,14 @@ members = [
"prjcombine_virtex4",
"prjcombine_ultrascale",
"prjcombine_versal",
"prjcombine_xc4000_naming",
"prjcombine_xc5200_naming",
"prjcombine_virtex_naming",
"prjcombine_virtex2_naming",
"prjcombine_virtex4_naming",
"prjcombine_spartan6_naming",
"prjcombine_ultrascale_naming",
"prjcombine_versal_naming",
"prjcombine_rdgrid",
"prjcombine_rdintb",
"prjcombine_rdverify",
Expand Down Expand Up @@ -73,37 +82,46 @@ prjcombine_rdbuild = { path = "prjcombine_rdbuild" }
prjcombine_toolchain = { path = "prjcombine_toolchain" }
prjcombine_xdl = { path = "prjcombine_xdl" }
prjcombine_int = { path = "prjcombine_int" }
prjcombine_xilinx_naming = { path = "prjcombine_xilinx_naming" }
prjcombine_rdgrid = { path = "prjcombine_rdgrid" }
prjcombine_rdintb = { path = "prjcombine_rdintb" }
prjcombine_rdverify = { path = "prjcombine_rdverify" }
prjcombine_xc4000 = { path = "prjcombine_xc4000" }
prjcombine_xc4000_naming = { path = "prjcombine_xc4000_naming" }
prjcombine_xc4000_rdverify = { path = "prjcombine_xc4000_rdverify" }
prjcombine_xc4000_rd2db = { path = "prjcombine_xc4000_rd2db" }
prjcombine_xc5200 = { path = "prjcombine_xc5200" }
prjcombine_xc5200_naming = { path = "prjcombine_xc5200_naming" }
prjcombine_xc5200_rdverify = { path = "prjcombine_xc5200_rdverify" }
prjcombine_xc5200_rd2db = { path = "prjcombine_xc5200_rd2db" }
prjcombine_virtex = { path = "prjcombine_virtex" }
prjcombine_virtex_naming = { path = "prjcombine_virtex_naming" }
prjcombine_virtex_rdverify = { path = "prjcombine_virtex_rdverify" }
prjcombine_virtex_rd2db = { path = "prjcombine_virtex_rd2db" }
prjcombine_virtex2 = { path = "prjcombine_virtex2" }
prjcombine_virtex2_naming = { path = "prjcombine_virtex2_naming" }
prjcombine_virtex2_rdverify = { path = "prjcombine_virtex2_rdverify" }
prjcombine_virtex2_rd2db = { path = "prjcombine_virtex2_rd2db" }
prjcombine_virtex4 = { path = "prjcombine_virtex4" }
prjcombine_virtex4_naming = { path = "prjcombine_virtex4_naming" }
prjcombine_virtex4_rdverify = { path = "prjcombine_virtex4_rdverify" }
prjcombine_virtex4_rd2db = { path = "prjcombine_virtex4_rd2db" }
prjcombine_virtex5_rdverify = { path = "prjcombine_virtex5_rdverify" }
prjcombine_virtex5_rd2db = { path = "prjcombine_virtex5_rd2db" }
prjcombine_virtex6_rdverify = { path = "prjcombine_virtex6_rdverify" }
prjcombine_virtex6_rd2db = { path = "prjcombine_virtex6_rd2db" }
prjcombine_virtex7_rdverify = { path = "prjcombine_virtex7_rdverify" }
prjcombine_virtex7_rd2db = { path = "prjcombine_virtex7_rd2db" }
prjcombine_spartan6 = { path = "prjcombine_spartan6" }
prjcombine_spartan6_rd2db = { path = "prjcombine_spartan6_rd2db" }
prjcombine_spartan6_naming = { path = "prjcombine_spartan6_naming" }
prjcombine_spartan6_rdverify = { path = "prjcombine_spartan6_rdverify" }
prjcombine_virtex7_rdverify = { path = "prjcombine_virtex7_rdverify" }
prjcombine_virtex7_rd2db = { path = "prjcombine_virtex7_rd2db" }
prjcombine_ultrascale = { path = "prjcombine_ultrascale" }
prjcombine_ultrascale_naming = { path = "prjcombine_ultrascale_naming" }
prjcombine_ultrascale_rdverify = { path = "prjcombine_ultrascale_rdverify" }
prjcombine_ultrascale_rd2db = { path = "prjcombine_ultrascale_rd2db" }
prjcombine_versal = { path = "prjcombine_versal" }
prjcombine_versal_naming = { path = "prjcombine_versal_naming" }
prjcombine_versal_rdverify = { path = "prjcombine_versal_rdverify" }
prjcombine_versal_rd2db = { path = "prjcombine_versal_rd2db" }
prjcombine_xilinx_geom = { path = "prjcombine_xilinx_geom" }
Expand All @@ -118,7 +136,7 @@ prjcombine_sdf = { path = "prjcombine_sdf" }
prjcombine_xc9500 = { path = "prjcombine_xc9500" }
prjcombine_xpla3 = { path = "prjcombine_xpla3" }
prjcombine_xc2c = { path = "prjcombine_xc2c" }
unnamed_entity = { version = "0.1.4", features = ["bitvec", "map", "serde"] }
unnamed_entity = { version = "0.1.5", features = ["bitvec", "map", "serde"] }
assert_matches = "1.5"
serde = { version = "1.0", features = ["derive"] }
serde_json = "1.0"
Expand Down
1 change: 0 additions & 1 deletion prjcombine_collector/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -992,7 +992,6 @@ impl Collector<'_> {

self.tiledb.insert(tile, bel, attr, item);
}

}

pub fn extract_bitvec_val_part(item: &TileItem<TileBit>, base: &BitVec, diff: &mut Diff) -> BitVec {
Expand Down
212 changes: 12 additions & 200 deletions prjcombine_int/src/db.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -48,119 +48,39 @@ entity_id! {
pub id WireId u16, reserve 1;
pub id NodeKindId u16, reserve 1;
pub id TermKindId u16, reserve 1;
pub id NodeNamingId u16, reserve 1;
pub id TermNamingId u16, reserve 1;
pub id NodeTileId u16, reserve 1;
pub id NodeRawTileId u16, reserve 1;
pub id NodeIriId u16, reserve 1;
pub id BelId u16, reserve 1;
}

#[derive(Clone, Debug, Serialize, Deserialize)]
pub struct IntDb {
pub name: String,
pub wires: EntityMap<WireId, String, WireKind>,
pub nodes: EntityMap<NodeKindId, String, NodeKind>,
pub terms: EntityMap<TermKindId, String, TermKind>,
pub node_namings: EntityMap<NodeNamingId, String, NodeNaming>,
pub term_namings: EntityMap<TermNamingId, String, TermNaming>,
}

impl IntDb {
#[track_caller]
pub fn get_wire(&self, name: &str) -> WireId {
self.wires.get(name).unwrap().0
self.wires
.get(name)
.unwrap_or_else(|| panic!("no wire {name}"))
.0
}
#[track_caller]
pub fn get_node(&self, name: &str) -> NodeKindId {
self.nodes.get(name).unwrap().0
self.nodes
.get(name)
.unwrap_or_else(|| panic!("no node {name}"))
.0
}
#[track_caller]
pub fn get_term(&self, name: &str) -> TermKindId {
self.terms.get(name).unwrap().0
}
#[track_caller]
pub fn get_node_naming(&self, name: &str) -> NodeNamingId {
self.node_namings.get(name).unwrap().0
}
#[track_caller]
pub fn get_term_naming(&self, name: &str) -> TermNamingId {
self.term_namings.get(name).unwrap().0
}

pub fn merge(&mut self, other: IntDb) {
assert_eq!(self.wires, other.wires);
macro_rules! merge_dicts {
($f:ident) => {
for (_, k, v) in other.$f {
match self.$f.get(&k) {
None => {
self.$f.insert(k, v);
}
Some((_, v2)) => {
if v != *v2 {
println!("FAIL at {}", k);
}
assert_eq!(&v, v2);
}
}
}
};
}
merge_dicts!(nodes);
merge_dicts!(terms);
for (_, k, v) in other.node_namings {
match self.node_namings.get_mut(&k) {
None => {
self.node_namings.insert(k, v);
}
Some((_, v2)) => {
for (kk, vv) in v.wires {
match v2.wires.get(&kk) {
None => {
v2.wires.insert(kk, vv);
}
Some(vv2) => {
assert_eq!(&vv, vv2);
}
}
}
assert_eq!(v.wire_bufs, v2.wire_bufs);
assert_eq!(v.ext_pips, v2.ext_pips);
assert_eq!(v.bels, v2.bels);
for (kk, vv) in v.intf_wires_in {
match v2.intf_wires_in.get(&kk) {
None => {
v2.intf_wires_in.insert(kk, vv);
}
Some(vv2) => {
assert_eq!(&vv, vv2);
}
}
}
for (kk, vv) in v.intf_wires_out {
match v2.intf_wires_out.get(&kk) {
None => {
v2.intf_wires_out.insert(kk, vv);
}
Some(vv2 @ IntfWireOutNaming::Buf { name_out, .. }) => match vv {
IntfWireOutNaming::Buf { .. } => assert_eq!(&vv, vv2),
IntfWireOutNaming::Simple { name } => assert_eq!(name_out, &name),
},
Some(vv2 @ IntfWireOutNaming::Simple { name }) => {
if let IntfWireOutNaming::Buf { name_out, .. } = &vv {
assert_eq!(name_out, name);
v2.intf_wires_out.insert(kk, vv);
} else {
assert_eq!(&vv, vv2);
}
}
}
}
}
}
}
merge_dicts!(term_namings);
self.terms
.get(name)
.unwrap_or_else(|| panic!("no term {name}"))
.0
}
}

Expand Down Expand Up @@ -247,85 +167,6 @@ pub enum IriPin {
Imux(u32),
}

#[derive(Clone, Debug, Eq, PartialEq, Default, Serialize, Deserialize)]
pub struct NodeNaming {
pub wires: BTreeMap<NodeWireId, String>,
pub wire_bufs: BTreeMap<NodeWireId, NodeExtPipNaming>,
pub ext_pips: BTreeMap<(NodeWireId, NodeWireId), NodeExtPipNaming>,
pub bels: EntityVec<BelId, BelNaming>,
pub iris: EntityVec<NodeIriId, IriNaming>,
pub intf_wires_out: BTreeMap<NodeWireId, IntfWireOutNaming>,
pub intf_wires_in: BTreeMap<NodeWireId, IntfWireInNaming>,
}

#[derive(Clone, Debug, Eq, PartialEq, Serialize, Deserialize)]
pub struct NodeExtPipNaming {
pub tile: NodeRawTileId,
pub wire_to: String,
pub wire_from: String,
}

#[derive(Clone, Debug, Eq, PartialEq, Serialize, Deserialize)]
pub struct BelNaming {
pub tile: NodeRawTileId,
pub pins: BTreeMap<String, BelPinNaming>,
}

#[derive(Clone, Debug, Eq, PartialEq, Default, Serialize, Deserialize)]
pub struct BelPinNaming {
pub name: String,
pub name_far: String,
pub pips: Vec<NodeExtPipNaming>,
pub int_pips: BTreeMap<NodeWireId, NodeExtPipNaming>,
pub is_intf_out: bool,
}

#[derive(Clone, Debug, Eq, PartialEq, Serialize, Deserialize)]
pub struct IriNaming {
pub tile: NodeRawTileId,
pub kind: String,
}

#[derive(Clone, Debug, Eq, PartialEq, Serialize, Deserialize)]
pub enum IntfWireOutNaming {
Simple { name: String },
Buf { name_out: String, name_in: String },
}

#[derive(Clone, Debug, Eq, PartialEq, Serialize, Deserialize)]
pub enum IntfWireInNaming {
Simple {
name: String,
},
Buf {
name_out: String,
name_in: String,
},
TestBuf {
name_out: String,
name_in: String,
},
Delay {
name_out: String,
name_in: String,
name_delay: String,
},
Iri {
name_out: String,
name_pin_out: String,
name_pin_in: String,
name_in: String,
},
IriDelay {
name_out: String,
name_delay: String,
name_pre_delay: String,
name_pin_out: String,
name_pin_in: String,
name_in: String,
},
}

#[derive(Clone, Debug, Eq, PartialEq, Serialize, Deserialize)]
pub struct TermKind {
pub dir: Dir,
Expand All @@ -339,35 +180,6 @@ pub enum TermInfo {
PassFar(WireId),
}

#[derive(Clone, Debug, Eq, PartialEq, Default, Serialize, Deserialize)]
pub struct TermNaming {
pub wires_out: EntityPartVec<WireId, TermWireOutNaming>,
pub wires_in_near: EntityPartVec<WireId, String>,
pub wires_in_far: EntityPartVec<WireId, TermWireInFarNaming>,
}

#[derive(Clone, Debug, Eq, PartialEq, Serialize, Deserialize)]
pub enum TermWireOutNaming {
Simple { name: String },
Buf { name_out: String, name_in: String },
}

#[derive(Clone, Debug, Eq, PartialEq, Serialize, Deserialize)]
pub enum TermWireInFarNaming {
Simple {
name: String,
},
Buf {
name_out: String,
name_in: String,
},
BufFar {
name: String,
name_far_out: String,
name_far_in: String,
},
}

#[derive(Clone, Debug)]
pub struct IntDbIndex {
pub nodes: EntityVec<NodeKindId, NodeIndex>,
Expand Down
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