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  1. VHDL-Project-16-bit-RISC-Processor VHDL-Project-16-bit-RISC-Processor Public

    Forked from sameersondur/VHDL-Project-16-bit-RISC-Processor

    Designed a RISC processor with 16 bit instruction set, 4-stage pipeline and a non-pre-emptive interrupt handler. Implemented it in VHDL and tested it by simulating in ModelSim.

    VHDL