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Renaming ports and signals to ensure a consistent naming convention #261

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@ptpan ptpan commented Dec 7, 2023

This PR implements the following signal and port name changes to ensure a consistent naming convention:

  • reqstream/respstream -> req/rsp
  • reset -> rst
  • req/resp -> req/rsp

With this PR, we will be using three-letter names across important ports/signals: clk, rst, val, rdy, req, rsp.

@ptpan ptpan changed the base branch from master to pp482-ece4750-2022-changes December 7, 2023 06:48
@ptpan ptpan force-pushed the pp482-port-renaming branch from 72f1807 to e6c2253 Compare December 7, 2023 06:49
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codecov bot commented Dec 7, 2023

Codecov Report

Attention: 15 lines in your changes are missing coverage. Please review.

Comparison is base (6da7397) 90.27% compared to head (72f1807) 89.82%.

❗ Current head 72f1807 differs from pull request most recent head e6c2253. Consider uploading reports for the commit e6c2253 to get more accurate results

Files Patch % Lines
pymtl3/stdlib/mem/MemRequesterAdapterFL.py 0.00% 7 Missing ⚠️
pymtl3/stdlib/xcel/XcelRequesterAdapterFL.py 0.00% 7 Missing ⚠️
pymtl3/stdlib/reqresp/ifcs/ifcs.py 83.33% 1 Missing ⚠️
Additional details and impacted files
@@                      Coverage Diff                       @@
##           pp482-ece4750-2022-changes     #261      +/-   ##
==============================================================
- Coverage                       90.27%   89.82%   -0.45%     
==============================================================
  Files                             317      317              
  Lines                           29199    28222     -977     
==============================================================
- Hits                            26358    25350    -1008     
- Misses                           2841     2872      +31     

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@ptpan ptpan closed this Jan 29, 2024
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