Fix the inconsistencies following the rebase on branch dev.

quarkslab · Jan 19, 2024 · d6383d1 · d6383d1
1 parent 675ab4c
commit d6383d1
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Showing 7 changed files with 82 additions and 94 deletions.
diff --git a/qemu/rh850.h b/qemu/rh850.h
@@ -4,6 +4,10 @@
 #ifndef UNICORN_ARCH_POSTFIX
 #define UNICORN_ARCH_POSTFIX _rh850
 #endif
+#define unicorn_fill_tlb unicorn_fill_tlb_rh850
+#define reg_read reg_read_rh850
+#define reg_write reg_write_rh850
+#define uc_init uc_init_rh850
 #define uc_add_inline_hook uc_add_inline_hook_rh850
 #define uc_del_inline_hook uc_del_inline_hook_rh850
 #define tb_invalidate_phys_range tb_invalidate_phys_range_rh850
@@ -119,7 +123,10 @@
 #define memory_map memory_map_rh850
 #define memory_map_io memory_map_io_rh850
 #define memory_map_ptr memory_map_ptr_rh850
+#define memory_cow memory_cow_rh850
 #define memory_unmap memory_unmap_rh850
+#define memory_moveout memory_moveout_rh850
+#define memory_movein memory_movein_rh850
 #define memory_free memory_free_rh850
 #define flatview_unref flatview_unref_rh850
 #define address_space_get_flatview address_space_get_flatview_rh850
@@ -138,14 +145,17 @@
 #define memory_region_get_ram_addr memory_region_get_ram_addr_rh850
 #define memory_region_add_subregion memory_region_add_subregion_rh850
 #define memory_region_del_subregion memory_region_del_subregion_rh850
+#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_rh850
 #define memory_region_find memory_region_find_rh850
+#define memory_region_filter_subregions memory_region_filter_subregions_rh850
 #define memory_listener_register memory_listener_register_rh850
 #define memory_listener_unregister memory_listener_unregister_rh850
 #define address_space_remove_listeners address_space_remove_listeners_rh850
 #define address_space_init address_space_init_rh850
 #define address_space_destroy address_space_destroy_rh850
 #define memory_region_init_ram memory_region_init_ram_rh850
 #define memory_mapping_list_add_merge_sorted memory_mapping_list_add_merge_sorted_rh850
+#define find_memory_mapping find_memory_mapping_rh850
 #define exec_inline_op exec_inline_op_rh850
 #define floatx80_default_nan floatx80_default_nan_rh850
 #define float_raise float_raise_rh850

diff --git a/qemu/target/rh850/cpu.h b/qemu/target/rh850/cpu.h
@@ -23,6 +23,8 @@
 
 #define TCG_GUEST_DEFAULT_MO 0
 
+//#define TARGET_INSN_START_EXTRA_WORDS 2
+
 #define ELF_MACHINE EM_RH850
 #define CPUArchState struct CPURH850State
 

diff --git a/qemu/target/rh850/translate.c b/qemu/target/rh850/translate.c
@@ -40,7 +40,26 @@
 /*
  * Unicorn: Special disas state for exiting in the middle of tb.
  */
-#define DISAS_UC_EXIT    DISAS_TARGET_6
+
+/* We are not using a goto_tb (for whatever reason), but have updated
+   the PC (for whatever reason), so there's no need to do it again on
+   exiting the TB.  */
+#define DISAS_PC_UPDATED        DISAS_TARGET_0
+
+/* We have emitted one or more goto_tb.  No fixup required.  */
+#define DISAS_GOTO_TB           DISAS_TARGET_1
+
+/* We have updated the PC and CC values.  */
+#define DISAS_PC_CC_UPDATED     DISAS_TARGET_2
+
+/* We are exiting the TB, but have neither emitted a goto_tb, nor
+   updated the PC for the next instruction to be executed.  */
+#define DISAS_PC_STALE          DISAS_TARGET_3
+
+/* We are exiting the TB to the main loop.  */
+#define DISAS_PC_STALE_NOCHAIN  DISAS_TARGET_4
+
+#define DISAS_UNICORN_HALT DISAS_TARGET_11
 
 /* global register indices */
 static TCGv cpu_gpr[NUM_GP_REGS];
@@ -4961,7 +4980,8 @@ static void rh850_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
     bool insn_hook = false;
 
     if (uc_addr_is_exit(dc->uc, dc->base.pc_next)) {
-        dcbase->is_jmp = DISAS_UC_EXIT;
+        // imitate PGM exception to halt emulation
+        dcbase->is_jmp = DISAS_UNICORN_HALT;
     }
     else
     {
@@ -5028,6 +5048,13 @@ static void rh850_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
     }
 }
 
+static void update_pc_addr(DisasContext *s)
+{
+    /* psw.addr */
+    TCGContext *tcg_ctx = s->uc->tcg_ctx;
+    tcg_gen_movi_i32(tcg_ctx, tcg_ctx->cpu_pc, s->base.pc_next);
+}
+
 // Emit exit TB code according to base.is_jmp
 static void rh850_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
 {
@@ -5049,7 +5076,14 @@ static void rh850_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
 
     switch (dc->base.is_jmp)
     {
+    case DISAS_UNICORN_HALT:
+        tcg_gen_movi_tl(tcg_ctx, cpu_pc, dc->pc);
+        gen_exception_halt(dc);
+        break;
     case DISAS_TOO_MANY:
+    case DISAS_PC_STALE:
+    case DISAS_PC_STALE_NOCHAIN:
+        update_pc_addr(dc);
         gen_goto_tb_imm(dc, 0, dc->pc);
         break;
     case DISAS_INDIRECT_JUMP:
@@ -5062,10 +5096,6 @@ static void rh850_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
     case DISAS_NORETURN:
     case DISAS_TB_EXIT_ALREADY_GENERATED:
     	break;
-    case DISAS_UC_EXIT:
-        tcg_gen_movi_tl(tcg_ctx, cpu_pc, dc->pc);
-        gen_exception_halt(dc);
-        break;
     default:
         g_assert_not_reached();
     }

diff --git a/qemu/target/rh850/unicorn.c b/qemu/target/rh850/unicorn.c
@@ -12,12 +12,12 @@ RH850CPU *cpu_rh850_init(struct uc_struct *uc, const char *cpu_model);
 
 static void rh850_set_pc(struct uc_struct *uc, uint64_t address)
 {
-    rh850_cpu_set_pc(uc->cpu, address);
+    ((CPURH850State *)uc->cpu->env_ptr)->pc = address;
 }
 
 static uint64_t rh850_get_pc(struct uc_struct *uc)
 {
-    return rh850_cpu_get_pc(uc->cpu);
+    return ((CPURH850State *)uc->cpu->env_ptr)->pc;
 }
 
 static void rh850_release(void *ctx)
@@ -40,133 +40,78 @@ static void rh850_release(void *ctx)
     }
 }
 
-void rh850_reg_reset(struct uc_struct *uc)
+static void reg_reset(struct uc_struct *uc)
 {
     CPUArchState *env = uc->cpu->env_ptr;
 
     memset(env->gpRegs, 0, sizeof(env->gpRegs));
     env->pc = 0;
 }
 
-static void reg_read(CPURH850State *env, unsigned int regid, void *value)
+DEFAULT_VISIBILITY
+uc_err reg_read(void *_env, int mode, unsigned int regid, void *value, size_t *size)
 {
     int sel_id;
+    CPURH850State *env = _env;
+    uc_err ret = UC_ERR_ARG;
 
     /* PC */
     if (regid == UC_RH850_REG_PC)
     {
+        CHECK_REG_TYPE(uint32_t);
         *(uint32_t *)value = env->pc;
-        return;
     }
 
     /* General purpose register. */
     if ((regid >= UC_RH850_REG_R0) && (regid <= UC_RH850_REG_R31))
     {
+        CHECK_REG_TYPE(uint32_t);
         *(uint32_t *)value = env->gpRegs[regid];
-        return;
     }
 
     /* System registers. */
-    if ((regid >= UC_RH850_SYSREG_SELID0) && (regid <= (UC_RH850_SYSREG_SELID7 + 32)))
+    if ((regid >= UC_RH850_SYSREG_SELID0) && (regid < (UC_RH850_SYSREG_SELID7 + 32)))
     {
+        CHECK_REG_TYPE(uint32_t);
         sel_id = (regid - 32)/32;
         *(uint32_t *)value = env->systemRegs[sel_id][regid % 32];
-        return;
     }
+
+    return ret;
 }
 
-static void reg_write(CPURH850State *env, unsigned int regid, const void *value)
-{
-    /* TODO */
 
+DEFAULT_VISIBILITY
+uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value, size_t *size, int *setpc)
+{
     int sel_id;
+    CPURH850State *env = _env;
+    uc_err ret = UC_ERR_ARG;
 
     /* PC */
     if (regid == UC_RH850_REG_PC)
     {
+        CHECK_REG_TYPE(uint32_t);
         env->pc = *(uint32_t *)value;
-        return;
+        *setpc = 1;
     }
 
     /* General purpose register. */
     if ((regid >= UC_RH850_REG_R0) && (regid <= UC_RH850_REG_R31))
     {
+        CHECK_REG_TYPE(uint32_t);
         env->gpRegs[regid] = *(uint32_t *)value;
-        return;
     }
 
     /* System registers. */
     if ((regid >= UC_RH850_SYSREG_SELID0) && (regid <= (UC_RH850_SYSREG_SELID7 + 32)))
     {
+        CHECK_REG_TYPE(uint32_t);
         sel_id = (regid - 32)/32;
         env->systemRegs[sel_id][regid % 32] = *(uint32_t *)value;
-        return;
     }
-}
-
-static int rh850_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals,
-                         int count)
-{
-    CPURH850State *env = &(RH850_CPU(uc->cpu)->env);
-    int i;
 
-    for (i = 0; i < count; i++) {
-        unsigned int regid = regs[i];
-        void *value = vals[i];
-        reg_read(env, regid, value);
-    }
-    return 0;
-}
-
-static int rh850_reg_write(struct uc_struct *uc, unsigned int *regs,
-                          void *const *vals, int count)
-{
-    CPURH850State *env = &(RH850_CPU(uc->cpu)->env);
-    int i;
-
-    for (i = 0; i < count; i++) {
-        unsigned int regid = regs[i];
-        const void *value = vals[i];
-        reg_write(env, regid, value);
-        if (regid == UC_RH850_REG_PC) {
-            // force to quit execution and flush TB
-            uc->quit_request = true;
-            uc_emu_stop(uc);
-        }
-    }
-    return 0;
-}
-
-DEFAULT_VISIBILITY
-int rh850_context_reg_read(struct uc_context *ctx, unsigned int *regs,
-                          void **vals, int count)
-{
-    CPURH850State *env = (CPURH850State *)ctx->data;
-    int i;
-
-    for (i = 0; i < count; i++) {
-        unsigned int regid = regs[i];
-        void *value = vals[i];
-        reg_read(env, regid, value);
-    }
-
-    return 0;
-}
-
-DEFAULT_VISIBILITY
-int rh850_context_reg_write(struct uc_context *ctx, unsigned int *regs,
-                           void *const *vals, int count)
-{
-    CPURH850State *env = (CPURH850State *)ctx->data;
-    int i;
-
-    for (i = 0; i < count; i++) {
-        unsigned int regid = regs[i];
-        const void *value = vals[i];
-        reg_write(env, regid, value);
-    }
-
-    return 0;
+    return ret;
 }
 
 static int rh850_cpus_init(struct uc_struct *uc, const char *cpu_model)
@@ -183,10 +128,10 @@ static int rh850_cpus_init(struct uc_struct *uc, const char *cpu_model)
 DEFAULT_VISIBILITY
 void rh850_uc_init(struct uc_struct *uc)
 {
+    uc->reg_read = reg_read;
+    uc->reg_write = reg_write;
+    uc->reg_reset = reg_reset;
     uc->release = rh850_release;
-    uc->reg_read = rh850_reg_read;
-    uc->reg_write = rh850_reg_write;
-    uc->reg_reset = rh850_reg_reset;
     uc->set_pc = rh850_set_pc;
     uc->get_pc = rh850_get_pc;
     uc->cpus_init = rh850_cpus_init;

diff --git a/qemu/target/rh850/unicorn.h b/qemu/target/rh850/unicorn.h
@@ -5,12 +5,12 @@
 #define UC_QEMU_TARGET_RH850_H
 
 // functions to read & write registers
-int rh850_context_reg_read(struct uc_context *ctx, unsigned int *regs,
-                          void **vals, int count);
-int rh850_context_reg_write(struct uc_context *ctx, unsigned int *regs,
-                           void *const *vals, int count);
+uc_err reg_read_rh850(void *_env, int mode, unsigned int regid, void *value,
+                size_t *size);
+uc_err reg_write_rh850(void *_env, int mode, unsigned int regid, const void *value,
+                 size_t *size, int *setpc);
 
-void rh850_reg_reset(struct uc_struct *uc);
+void reg_reset_rh850(struct uc_struct *uc);
 
 void rh850_uc_init(struct uc_struct *uc);
 #endif
diff --git a/symbols.sh b/symbols.sh
@@ -6271,6 +6271,7 @@ tcg_s390_data_exception \
 rh850_SYMBOLS="restore_state_to_opc \
 helper_tlb_flush \
 helper_uc_rh850_exit \
+gen_intermediate_code \
 "
 
 tricore_SYMBOLS="

diff --git a/uc.c b/uc.c
@@ -2152,8 +2152,8 @@ static context_reg_rw_t find_context_reg_rw(uc_arch arch, uc_mode mode)
 #endif
 #ifdef UNICORN_HAS_RH850
     case UC_ARCH_RH850:
-        rw->context_reg_read = rh850_context_reg_read;
-        rw->context_reg_write = rh850_context_reg_write;
+        rw.read = reg_read_rh850;
+        rw.write = reg_write_rh850;
         break;
 #endif
 #ifdef UNICORN_HAS_RISCV