Skip to content

Minor fixups to compile with TF-M #2403

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 2 commits into
base: develop
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion src/common/pico_sync/sem.c
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ void sem_init(semaphore_t *sem, int16_t initial_permits, int16_t max_permits) {
}

int __time_critical_func(sem_available)(semaphore_t *sem) {
#ifdef __GNUC__
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
return *(volatile typeof(sem->permits) *) &sem->permits;
#else
static_assert(sizeof(sem->permits) == 2, "");
Expand Down
4 changes: 4 additions & 0 deletions src/rp2_common/hardware_flash/flash.c
Original file line number Diff line number Diff line change
Expand Up @@ -299,7 +299,11 @@ static void flash_devinfo_update_field(uint16_t wdata, uint16_t mask) {
// Boot RAM does not support exclusives, but does support RWTYPE SET/CLR/XOR (with byte
// strobes). Can't use hw_write_masked because it performs a 32-bit write.
io_rw_16 *devinfo = flash_devinfo_ptr();
#ifdef __STRICT_ANSI__
*(io_rw_16 *)hw_xor_alias_untyped(devinfo) = (*devinfo ^ wdata) & mask;
#else
*hw_xor_alias(devinfo) = (*devinfo ^ wdata) & mask;
#endif
}

// This is a RAM function because may be called during flash programming to enable save/restore of
Expand Down
5 changes: 5 additions & 0 deletions src/rp2_common/pico_multicore/multicore.c
Original file line number Diff line number Diff line change
Expand Up @@ -101,8 +101,13 @@ int core1_wrapper(int (*entry)(void), void *stack_base) {
void multicore_reset_core1(void) {
// Use atomic aliases just in case core 1 is also manipulating some PSM state
io_rw_32 *power_off = (io_rw_32 *) (PSM_BASE + PSM_FRCE_OFF_OFFSET);
#ifdef __STRICT_ANSI__
io_rw_32 *power_off_set = hw_set_alias_untyped(power_off);
io_rw_32 *power_off_clr = hw_clear_alias_untyped(power_off);
#else
io_rw_32 *power_off_set = hw_set_alias(power_off);
io_rw_32 *power_off_clr = hw_clear_alias(power_off);
#endif

// Hard-reset core 1.
// Reading back confirms the core 1 reset is in the correct state, but also
Expand Down