Binary Spectrum-unified Neuroevolutionary A rchitecture capable of executing OpenCL kernels. This project presents a different approach to train from scratch Binary Neural Networks (BNN) using neuroevolution as its base technique (gradient descent free) that takes advantage of OpenCL acceleration.
Obtain non-linear Deep NN that use binary values in weights, activations, operations and is completely gradient free; which brings us to the brief summary of the capabilities of shown with this implementation:
• Weights and activations are represented with fixed length bitset (16 bits) • Only logic operations (AND, XOR, OR...) are used, no need of Arithmetic Logic Unit (ALU) • Neuroevolution is employed to drive the space search • BNN do not have a fixed network topology, which adapt and optimize for the problem at hand.
This project has been tested with correct execution on Linux and MacOS. It has two main library requirement in order to be able to compile code from the makefile. The first, it needs the OpenCL development libraries. If running in a Debian/Ubuntu distribution it is as simple as running
sudo apt install build-essential opencl-dev
The second is GRPC, which involves more steps necessary to compile the code. In order to recreate that environment, check the file "Install-Compile-Execute.sh"
If an FPGA is the target platform, an special compiler is needed to obtain the bitstream used to deploy on these boards, that is used to reprogram it at time the binary executes.
Once a binary is obtained, it is just about to executing the file along with a configuration file that provides all runtime details like the following:
./bisuna resources/BiSUNAConf.ini
The ini file will instruct BiSUNA what type of execution, device type and all other details. Have in consideration that BiSUNAConf.ini has a parameter "EnvironmentConf", which should have the path to another "ini" file with the correct environment details.
- Mountain Car
- Double Cart Pole (with and without velocities)
- Function Approximation
- Multiplexer
- Single Cart Pole
- SymmetricEncryption
- OpenAI Gym: MoutainCar-v0, NChain-v0, Roulette-v0, Copy-v0 & DuplicatedInput-v0
Note: This project was inpired on repository from Physis-Shard implementation.
Below are shown three screenshots of the resource utilization when BiSUNA was compiled for the Cyclone V:
Below are shown three screenshots of the resource utilization when BiSUNA was compiled for the Xilinx U50 board:
First paper reference about BiSUNA algorithm APCCAS 2019 Paper.
Second paper reference about Intel FPGA execution of BiSUNA FPT 2019 Paper.
Third Paper reference about Xilinx FPGA execution of BiSUNA CSDE FPGA 2020 Paper.
Fourth Paper reference about Adversarial Neuro Encoding using BiSUNA CSDE ANE 2020 Paper.