Many updates: (#4)

* Many updates:

 * Added pruning pass to remove dead/unreachable code
 * Added backend to generate an extension-specific document
 * Removed dependence on riscv-opcodes; all instruction .yaml files have their encoding now
 * Updated schema to be more version-centric with extensions
 * Started process of refactoring so that AstNodes don't have any irrelevant SyntaxNodes
 * Added some unit tests for the IDL compiler
 * Numerous bug fixes

.github/workflows/regress.yml

@@ -31,5 +31,7 @@ jobs:
       run: ./bin/build_container
     - name: Setup project
       run: ./bin/setup
+    - name: Run IDL tests
+      run: ./do idl_test
     - name: Build html documentation for generic_rv64
       run: ./do gen:html[generic_rv64]

.rubocop.yml

@@ -1,3 +1,5 @@
+require: rubocop-minitest
+
 AllCops:
   TargetRubyVersion: 3.2.3
 

Gemfile

@@ -6,9 +6,11 @@ source "https://rubygems.org"
 
 gem "asciidoctor-diagram", "~> 2.2"
 gem "asciidoctor-multipage"
+gem "asciidoctor-pdf"
 gem "base64"
 gem "bigdecimal"
 gem "json_schemer", "~> 1.0"
+gem "minitest"
 gem "rake", "~> 13.0"
 gem "slim", "~> 5.1"
 gem "treetop", "1.6.12"
@@ -17,4 +19,5 @@ gem "yard"
 
 group :development do
   gem "solargraph"
+  gem 'rubocop-minitest'
 end

Gemfile.lock

@@ -1,6 +1,10 @@
 GEM
   remote: https://rubygems.org/
   specs:
+    Ascii85 (1.1.1)
+    addressable (2.8.7)
+      public_suffix (>= 2.0.2, < 7.0)
+    afm (0.2.2)
     asciidoctor (2.0.23)
     asciidoctor-diagram (2.3.0)
       asciidoctor (>= 1.5.7, < 3.x)
@@ -13,14 +17,28 @@ GEM
       asciidoctor-diagram-batik (~> 1.17)
     asciidoctor-multipage (0.0.19)
       asciidoctor (>= 2.0.11, < 2.1)
+    asciidoctor-pdf (2.3.14)
+      asciidoctor (~> 2.0)
+      concurrent-ruby (~> 1.1)
+      matrix (~> 0.4)
+      prawn (~> 2.4.0)
+      prawn-icon (~> 3.0.0)
+      prawn-svg (~> 0.34.0)
+      prawn-table (~> 0.2.0)
+      prawn-templates (~> 0.1.0)
+      treetop (~> 1.6.0)
     ast (2.4.2)
     backport (1.2.0)
     base64 (0.2.0)
     benchmark (0.3.0)
     bigdecimal (3.1.8)
+    concurrent-ruby (1.3.3)
+    css_parser (1.17.1)
+      addressable
     diff-lcs (1.5.1)
     e2mmap (0.1.0)
     hana (1.3.7)
+    hashery (2.1.2)
     jaro_winkler (1.6.0)
     json (2.7.2)
     json_schemer (1.0.3)
@@ -32,13 +50,38 @@ GEM
     kramdown-parser-gfm (1.1.0)
       kramdown (~> 2.0)
     language_server-protocol (3.17.0.3)
+    matrix (0.4.2)
+    minitest (5.24.1)
     nokogiri (1.16.5-x86_64-linux)
       racc (~> 1.4)
     parallel (1.24.0)
     parser (3.3.2.0)
       ast (~> 2.4.1)
       racc
+    pdf-core (0.9.0)
+    pdf-reader (2.12.0)
+      Ascii85 (~> 1.0)
+      afm (~> 0.2.1)
+      hashery (~> 2.0)
+      ruby-rc4
+      ttfunk
     polyglot (0.3.5)
+    prawn (2.4.0)
+      pdf-core (~> 0.9.0)
+      ttfunk (~> 1.7)
+    prawn-icon (3.0.0)
+      prawn (>= 1.1.0, < 3.0.0)
+    prawn-svg (0.34.2)
+      css_parser (~> 1.6)
+      matrix (~> 0.4.2)
+      prawn (>= 0.11.1, < 3)
+      rexml (~> 3.2)
+    prawn-table (0.2.2)
+      prawn (>= 1.3.0, < 3.0.0)
+    prawn-templates (0.1.2)
+      pdf-reader (~> 2.0)
+      prawn (~> 2.2)
+    public_suffix (6.0.0)
     racc (1.8.0)
     rainbow (3.1.1)
     rake (13.2.1)
@@ -61,7 +104,11 @@ GEM
       unicode-display_width (>= 2.4.0, < 3.0)
     rubocop-ast (1.31.3)
       parser (>= 3.3.1.0)
+    rubocop-minitest (0.35.1)
+      rubocop (>= 1.61, < 2.0)
+      rubocop-ast (>= 1.31.1, < 2.0)
     ruby-progressbar (1.13.0)
+    ruby-rc4 (0.1.5)
     simpleidn (0.2.3)
     slim (5.2.1)
       temple (~> 0.10.0)
@@ -88,6 +135,8 @@ GEM
     tilt (2.3.0)
     treetop (1.6.12)
       polyglot (~> 0.3)
+    ttfunk (1.8.0)
+      bigdecimal (~> 3.1)
     unicode-display_width (2.5.0)
     webrick (1.8.1)
     yard (0.9.36)
@@ -98,10 +147,13 @@ PLATFORMS
 DEPENDENCIES
   asciidoctor-diagram (~> 2.2)
   asciidoctor-multipage
+  asciidoctor-pdf
   base64
   bigdecimal
   json_schemer (~> 1.0)
+  minitest
   rake (~> 13.0)
+  rubocop-minitest
   slim (~> 5.1)
   solargraph
   treetop (= 1.6.12)

arch/csr/mtval.yaml

@@ -22,7 +22,7 @@ mtval:
         ! [1] Instruction access fault ! The <% if ext?(:C) %> portion of the <% end %> virtual PC causing the access fault <%- unless ext?(:C) -%>(same as the value written to `mepc`)<%- end -%>.
         ! [2] Illegal Instruction ! The encoding of the illegal instruction.
         ! [3] Breakpoint
-        ! <%- if REPORT_EBREAK_PC_IN_TVAL -%>
+        ! <%- if REPORT_VA_IN_MTVAL_ON_BREAKPOINT -%>
           When caused by an EBREAK instruction, the virtual PC of the breakpoint instruction.
           <%- else -%>
           When caused by an EBREAK instruction, zero.

arch/csr/stval.yaml

@@ -22,7 +22,7 @@ stval:
         ! [1] Instruction access fault ! The <% if ext?(:C) %> portion of the <% end %> virtual PC causing the access fault <%- unless ext?(:C) -%>(same as the value written to `mepc`)<%- end -%>.
         ! [2] Illegal Instruction ! The encoding of the illegal instruction.
         ! [3] Breakpoint
-        ! <%- if REPORT_EBREAK_PC_IN_TVAL -%>
+        ! <%- if REPORT_VA_IN_STVAL_ON_BREAKPOINT -%>
           When caused by an EBREAK instruction, the virtual PC of the breakpoint instruction.
           <%- else -%>
           When caused by an EBREAK instruction, zero.

arch/csr/vstval.yaml

@@ -0,0 +1,96 @@
+# yaml-language-server: $schema=../../schemas/csr_schema.json
+
+vstval:
+  long_name: Virtual supervisor Trap Value
+  address: 0x243
+  virtual_address: 0x143
+  description: Holds trap-specific information
+  priv_mode: S
+  length: VSXLEN
+  definedBy: H
+  fields:
+    VALUE:
+      location_rv32: 31-0
+      location_rv64: 63-0
+      description: |
+        Written with trap-specific information when a trap is taken into VS-mode.
+
+        The values are:
+
+        !===
+        ! Exception type ! Value
+
+        ! [0] Instruction address misaligned ! The misaligned virtual PC (same as the value written to `mepc`).
+        ! [1] Instruction access fault ! The <% if ext?(:C) %> portion of the <% end %> virtual PC causing the access fault <%- unless ext?(:C) -%>(same as the value written to `mepc`)<%- end -%>.
+        ! [2] Illegal Instruction ! The encoding of the illegal instruction.
+        ! [3] Breakpoint
+        ! <%- if REPORT_VA_IN_STVAL_ON_BREAKPOINT -%>
+          When caused by an EBREAK instruction, the virtual PC of the breakpoint instruction.
+          <%- else -%>
+          When caused by an EBREAK instruction, zero.
+          <%- end -%>
+
+          When caused by a data address (_i.e._, watchpoint) breakpoint, the faulting virtual address.
+          When caused by an instruction address breakpoint, the faulting virtual PC.
+        ! [4] Load address misaligned ! The misaligned virtual load address.
+        ! [5] Load access fault
+        ! The part of virtual load address causing in the access fault.
+
+          When the load is misaligned, the reported value is the smallest address on the page causing a fault
+          (_e.g._, if an 8-byte load is equally split across a page and the fault occurs on the second page,
+          address + 4 is reported).
+
+          (Even though the access fault arises on a physical address, the virtual address is reported)
+        ! [6] Store/AMO address misaligned ! The misaligned virtual store/AMO address.
+        ! [7] Store/AMO access fault
+        ! The virtual store/AMO address causing the access fault.
+        
+          When the store/AMO is misaligned, the reported value is the smallest address on the page causing a fault
+          (_e.g._, if an 8-byte store is equally split across a page and the fault occurs on the second page,
+          address + 4 is reported).
+
+          (Even though the access fault arises on a physical address, the virtual address is reported)
+        ! [8] Environment call from U-mode <% if ext?(:H) %>or VU-mode<% end %> ! Zero
+        ! [9] Environment call from (H)S-mode ! Zero
+        <%- if ext?(:H) -%>
+        ! [10] Environment call from VS-mode ! Zero
+        <%- end -%>
+        ! [12] Instruction page fault
+        ! The <% if ext?(:C) %> portion of the <% end %> virtual PC causing the page fault
+          <% unless ext?(:C) %>(same as the value written to `mepc`)<% end %>.
+        ! [13] Load page fault
+        ! The part of the virtual load address causing in the page fault.
+          
+          When the load is misaligned, the reported value is the smallest address on the page causing a fault
+          (_e.g._, if an 8-byte load is equally split across a page and the fault occurs on the second page, address + 4 is reported).
+        ! [15] Store/AMO page fault
+        ! The virtual store/AMO address causing in the page fault.
+          
+          When the store/AMO is misaligned, the reported value is the smallest address on the page causing a fault
+          (_e.g._, if an 8-byte store is equally split across a page and the fault occurs on the second page, address + 4 is reported).
+        <%- if ext?(:H) -%>
+        ! [20] Instruction guest-page fault
+        ! The <% if ext?(:C) %> portion of the <% end %> virtual PC causing the fault <% unless ext?(:C) %>(same as the value written to `mepc`)<% end %>.
+        
+          The guest physical address is reported in `mtval2`.
+        ! [21] Load guest-page fault
+        ! The part of the virtual address causing the fault.
+
+          When the load is misaligned, the reported value is the smallest address on the page causing a fault
+          (_e.g._, if an 8-byte load is equally split across a page and the fault occurs on the second page, address + 4 is reported).
+          
+          The guest physical address is reported in `mtval2`.
+        ! [22] Virutal instruction
+        ! The encoding of the faulting virtual instruction.
+        ! [23] Store/AMO guest-page fault
+        ! The part of the virtual address causing the fault.
+        
+          When the store/AMO is misaligned, the reported value is the smallest address on the page causing a fault
+          (_e.g._, if an 8-byte store is equally split across a page and the fault occurs on the second page, address + 4 is reported).
+          
+          The guest physical address is reported in `htval`.
+        <%- end -%>
+        !===
+
+      type: RW-H
+      reset_value: 0

arch/ext/A.yaml

@@ -4,6 +4,7 @@ A:
   type: unprivileged
   versions:
   - version: 2.1
+    state: ratified
     ratification_date: 2019-12
     implies:
     - [Zaamo, 1.0]

arch/ext/B.yaml

@@ -4,6 +4,7 @@ B:
   type: unprivileged
   versions:
   - version: 1.0
+    state: ratified
     ratification_date: 2024-04
     url: https://drive.google.com/file/d/1SgLoasaBjs5WboQMaU3wpHkjUwV71UZn/view
     implies:

arch/ext/C.yaml

@@ -4,6 +4,7 @@ C:
   type: unprivileged
   versions:
   - version: 2.2
+    state: ratified
     ratification_date: 2019-12
   description: |
     The `C` extension reduces static and dynamic code size by

arch/ext/D.yaml

@@ -4,6 +4,7 @@ D:
   type: unprivileged
   versions:
   - version: 2.2
+    state: ratified
     ratification_date: 2019-12
     changes: Define NaN-boxing scheme, changed definition of FMAX and FMIN
     implies: [F, 2.2]

arch/ext/F.yaml

@@ -4,6 +4,7 @@ F:
   type: unprivileged
   versions:
   - version: 2.2
+    state: ratified
     ratification_date: 2019-12
     changes: Define NaN-boxing scheme, changed definition of FMAX and FMIN
   description: |

arch/ext/H.yaml

@@ -4,6 +4,7 @@ H:
   type: privileged
   versions:
   - version: 1.0
+    state: ratified
     ratification_date: 2019-12
     requires: [S, '>= 1.12']
   interrupt_codes:

arch/ext/I.yaml

@@ -4,6 +4,7 @@ I:
   type: unprivileged
   versions:
   - version: 2.1
+    state: ratified
     ratification_date: 2019-06
     changes: atified RVWMO memory model and exclusion of FENCE.I, counters, and CSR instructions that were in previous base ISA
   description: |

arch/ext/M.yaml

@@ -4,6 +4,7 @@ M:
   type: unprivileged
   versions:
   - version: 2.0
+    state: ratified
     ratification_date: 2019-12
   description: |
     This chapter describes the standard integer multiplication and division

arch/ext/S.yaml

@@ -4,8 +4,9 @@ S:
   type: privileged
   versions:
   - version: 1.12
+    state: ratified
     ratification_date: 2019-12
-    requires: [U, 1.12]
+    requires: [U, "= 1.12"]
   description: |
     This chapter describes the RISC-V supervisor-level architecture, which
     contains a common core that is used with various supervisor-level

arch/ext/Smaia.yaml

@@ -5,5 +5,6 @@ Smaia:
   type: privileged
   versions:
   - version: 1.0
+    state: ratified
     ratification_date: 2023-06
     url: https://github.com/riscv/riscv-aia/releases/download/1.0/riscv-interrupts-1.0.pdf

arch/ext/Smcdeleg.yaml

@@ -5,5 +5,6 @@ Smcdeleg:
   type: privileged
   versions:
   - version: 0
+    state: ratified
     ratification_date: null
     url: https://docs.google.com/document/d/1s-GeH5XpHBLzbQZucA8DPA7vvF7Xvf_nrPbrU2YLBcE/edit#heading=h.yyrgtolcaczx

arch/ext/Smcntrpmf.yaml

@@ -5,5 +5,6 @@ Smcntrpmf:
   type: privileged
   versions:
   - version: 1.0
+    state: ratified
     ratification_date: 2023-08
     url: https://github.com/riscv/riscv-smcntrpmf/releases/download/v1.0_rc4-frozen/riscv-smcntrpmf-v1.0_rc4.pdf

arch/ext/Ssaia.yaml

@@ -5,6 +5,7 @@ Ssaia:
   type: privileged
   versions:
   - version: 1.0
+    state: ratified
     ratification_date: 2023-06
     url: https://github.com/riscv/riscv-aia/releases/download/1.0/riscv-interrupts-1.0.pdf
     requires: [S, ">= 1.12"]

arch/ext/Ssccfg.yaml

@@ -5,5 +5,6 @@ Ssccfg:
   type: privileged
   versions:
   - version: 0
+    state: ratified
     ratification_date: null
     url: https://docs.google.com/document/d/1s-GeH5XpHBLzbQZucA8DPA7vvF7Xvf_nrPbrU2YLBcE/edit#heading=h.yyrgtolcaczx

arch/ext/Sscofpmf.yaml

@@ -5,5 +5,6 @@ Sscofpmf:
   type: privileged
   versions:
   - version: 1.0
+    state: ratified
     ratification_date: 2023-08
     url: https://drive.google.com/file/d/1KcjgbLM5L1ZKY8934aJl8aQwGlMz6Cbo/view?usp=drive_link

arch/ext/Sstc.yaml

@@ -5,5 +5,6 @@ Sstc:
   type: privileged
   versions:
   - version: 0.9
+    state: ratified
     ratification_date: null
     url: https://drive.google.com/file/d/1m84Re2yK8m_vbW7TspvevCDR82MOBaSX/view?usp=drive_link

arch/ext/Sv32.yaml

@@ -5,5 +5,6 @@ Sv32:
   type: privileged
   versions:
   - version: 1.12
+    state: ratified
     ratification_date: unknown
     url: https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf

arch/ext/Sv39.yaml

@@ -5,5 +5,6 @@ Sv39:
   type: privileged
   versions:
   - version: 1.12
+    state: ratified
     ratification_date: unknown
     url: https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf