Attempt #2 at new instruction schema

riscv-software-src · Nov 22, 2024 · 8d2b279 · 8d2b279
1 parent 537ef5d
commit 8d2b279
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Showing 14 changed files with 186 additions and 49 deletions.
diff --git a/arch/inst/I/add.yaml b/arch/inst/I/add.yaml
@@ -3,6 +3,7 @@
 $schema: "inst_schema.json#"
 kind: instruction
 name: add
+format: { $ref: inst_format/rtype.yaml# }
 long_name: Integer add
 description: |
   Add the value in rs1 to rs2, and store the result in rd.
@@ -12,19 +13,19 @@ assembly: xd, xs1, xs2
 encoding:
   match: 0000000----------000-----0110011
   variables:
-  - name: rs2
-    location: 24-20
-  - name: rs1
-    location: 19-15
-  - name: rd
-    location: 11-7
+  - field: { $ref: inst_format/rtype.yaml#/fields/name=rs2 }
+    name: xs2
+  - field: { $ref: inst_format/rtype.yaml#/fields/name=rs1 }
+    name: xs1
+  - field: { $ref: inst_format/rtype.yaml#/fields/name=rd }
+    name: xd
 access:
   s: always
   u: always
   vs: always
   vu: always
 data_independent_timing: true
-operation(): X[rd] = X[rs1] + X[rs2];
+operation(): X[xd] = X[xs1] + X[xs2];
 
 
 

diff --git a/arch/inst/I/addi.yaml b/arch/inst/I/addi.yaml
@@ -3,26 +3,27 @@
 $schema: "inst_schema.json#"
 kind: instruction
 name: addi
+format: { $ref: inst_format/itype.yaml# }
 long_name: Add immediate
 description: Add an immediate to the value in rs1, and store the result in rd
 definedBy: I
 assembly: xd, xs1, imm
 encoding:
   match: -----------------000-----0010011
   variables:
-  - name: imm
-    $inherits: common/inst_variable_types.yaml#/itype_imm
-  - name: rs1
-    location: 19-15
-  - name: rd
-    location: 11-7
+  - field: { $ref: inst_format/itype.yaml#/fields/name=imm }
+    name: imm
+  - field: { $ref: inst_format/itype.yaml#/fields/name=rs1 }
+    name: xs1
+  - field: { $ref: inst_format/itype.yaml#/fields/name=rd }
+    name: xd
 access:
   s: always
   u: always
   vs: always
   vu: always
 data_independent_timing: true
-operation(): X[rd] = X[rs1] + imm;
+operation(): X[xd] = X[xs1] + sext(imm, 31);
 
 
 

diff --git a/arch/inst/I/bne.yaml b/arch/inst/I/bne.yaml
@@ -3,6 +3,7 @@
 $schema: "inst_schema.json#"
 kind: instruction
 name: bne
+format: { $ref: inst_format/btype.yaml# }
 long_name: Branch if not equal
 description: |
   Branch to PC + imm if
@@ -14,13 +15,12 @@ assembly: xs1, xs2, imm
 encoding:
   match: -----------------001-----1100011
   variables:
-  - name: imm
-    location: 31|7|30-25|11-8
-    left_shift: 1
-  - name: rs2
-    location: 24-20
-  - name: rs1
-    location: 19-15
+  - field: { $ref: inst_format/btype.yaml#/fields/name=imm }
+    name: offset
+  - field: { $ref: inst_format/btype.yaml#/fields/name=rs2}
+    name: xs2
+  - field: { $ref: inst_format/btype.yaml#/fields/name=rs1}
+    name: rs1
 access:
   s: always
   u: always
@@ -31,7 +31,7 @@ operation(): |
   XReg rhs = X[rs2];
 
   if (lhs != rhs) {
-    jump_halfword($pc + imm);
+    jump_halfword($pc + sext(imm, 31));
   }
   
 

diff --git a/arch/inst/I/jal.yaml b/arch/inst/I/jal.yaml
@@ -4,6 +4,7 @@ $schema: "inst_schema.json#"
 kind: instruction
 name: jal
 long_name: Jump and link
+format: { $ref: inst_format/jtype.yaml# }
 description: |
   Jump to a PC-relative offset and store the return
   address in rd.
@@ -12,12 +13,10 @@ assembly: xd, imm
 encoding:
   match: -------------------------1101111
   variables:
-  - name: imm
-    location: 31|19-12|20|30-21
-    left_shift: 1
-    sign_extend: true
-  - name: rd
-    location: 11-7
+  - field: { $ref: inst_format/jtype.yaml#/fields/name=imm }
+    name: imm
+  - field: { $ref: inst_format/jtype.yaml#/fields/name=rd }
+    name: xd
 access:
   s: always
   u: always
@@ -26,8 +25,8 @@ access:
 operation(): |
   XReg retrun_addr = $pc + 4;
 
-  jump_halfword($pc + imm);
-  X[rd] = retrun_addr;
+  jump_halfword($pc + sext(imm, 31));
+  X[xd] = retrun_addr;
 
 
 

diff --git a/arch/inst/I/lb.yaml b/arch/inst/I/lb.yaml
@@ -4,30 +4,31 @@ $schema: "inst_schema.json#"
 kind: instruction
 name: lb
 long_name: Load byte
+format: { $ref: inst_format/itype.yaml# }
 description: |
   Load 8 bits of data into register `rd` from an
   address formed by adding `rs1` to a signed offset.
   Sign extend the result.
 definedBy: I
-assembly: xd, imm(rs1)
+assembly: xd, offset(rs1)
 encoding:
   match: -----------------000-----0000011
   variables:
-  - name: imm
-    location: 31-20
-  - name: rs1
-    location: 19-15
-  - name: rd
-    location: 11-7
+  - format: { $ref: inst_format/itype.yaml#/fields/name=imm }
+    name: offset
+  - format: { $ref: inst_format/itype.yaml#/fields/name=rs1 }
+    name: xs1
+  - format: { $ref: inst_format/itype.yaml#/fields/name=rs1 }
+    name: xd
 access:
   s: always
   u: always
   vs: always
   vu: always
 operation(): |
-  XReg virtual_address = X[rs1] + imm;
+  XReg virtual_address = X[xs1] + sext(imm, 31);
 
-  X[rd] = sext(read_memory<8>(virtual_address, $encoding), 8);
+  X[xd] = sext(read_memory<8>(virtual_address, $encoding), 8);
 
 
 

diff --git a/arch/inst/I/lui.yaml b/arch/inst/I/lui.yaml
@@ -3,25 +3,25 @@
 $schema: "inst_schema.json#"
 kind: instruction
 name: lui
+format: { $ref: inst_format/utype.yaml# }
 long_name: Load upper immediate
 description: Load the zero-extended imm into rd.
 definedBy: I
 assembly: xd, imm
 encoding:
   match: -------------------------0110111
   variables:
-  - name: imm
-    location: 31-12
-    left_shift: 12
-  - name: rd
-    location: 11-7
+  - field: { $ref: inst_format/utype.yaml#/fields/name=imm }
+    name: imm
+  - field: { $ref: inst_format/utype.yaml#/fields/name=rd }
+    name: xd
 access:
   s: always
   u: always
   vs: always
   vu: always
 data_independent_timing: true
-operation(): X[rd] = imm;
+operation(): X[xd] = sext(imm, 32);
 
 
 

diff --git a/arch/inst_format/btype.yaml b/arch/inst_format/btype.yaml
@@ -0,0 +1,23 @@
+
+$schema: inst_format.json#
+kind: instruction format
+name: B-type
+size: 32
+fields:
+- location: 31|7|30-25|11-8
+  name: imm
+  kind: immediate
+  left_shift: 1
+  sign_extend: true
+  relocations:
+  - $ref: relocation/R_RISCV_BRANCH.yaml#
+- location: 24-20
+  name: rs2
+  kind: x source register
+- location: 19-15
+  name: rs1
+  kind: x source register
+- location: 6-0
+  name: opcode
+  kind: opcode
+  opcode: true
diff --git a/arch/inst_format/itype.yaml b/arch/inst_format/itype.yaml
@@ -0,0 +1,28 @@
+
+$schema: inst_format.json#
+kind: instruction format
+name: I-type
+size: 32
+fields:
+- location: 31-20
+  name: imm
+  kind: immediate
+  sign_extend: true
+  relocations:
+  - $ref: relocation/R_RISCV_PCREL_LO12_I.yaml#
+  - $ref: relocation/R_RISCV_TPREL_LO12_I.yaml#
+  - $ref: relocation/R_RISCV_TLSDESC_ADD_LO12.yaml#
+  - $ref: relocation/R_RISCV_LO12_I.yaml#
+- location: 19-15
+  name: rs1
+  kind: x source register
+- location: 14-12
+  name: funct3
+  kind: opcode
+- location: 11-7
+  name: rd
+  kind: x destination register
+- location: 6-0
+  name: opcode
+  kind: opcode
+  opcode: true
diff --git a/arch/inst_format/jtype.yaml b/arch/inst_format/jtype.yaml
@@ -0,0 +1,21 @@
+
+
+$schema: inst_format.json#
+kind: instruction format
+name: J-type
+size: 32
+fields:
+- location: 31|19-12|20|30-21
+  name: imm
+  kind: immediate
+  left_shift: 1
+  sign_extend: true
+  relocations:
+  - $ref: relocation/R_RISCV_JAL.yaml#
+- location: 11-7
+  name: rd
+  kind: x destination register
+- location: 6-0
+  name: opcode
+  kind: opcode
+  opcode: true
diff --git a/arch/inst_format/rtype.yaml b/arch/inst_format/rtype.yaml
@@ -0,0 +1,26 @@
+
+
+$schema: inst_format.json#
+kind: instruction format
+name: R-type
+size: 32
+fields:
+- location: 31-25
+  name: funct7
+  kind: opcode  
+- location: 24-20
+  name: rs2
+  kind: x source register
+- location: 19-15
+  name: rs1
+  kind: x source register
+- location: 14-12
+  name: funct3
+  kind: opcode
+- location: 11-7
+  name: rd
+  kind: x destination register
+- location: 6-0
+  name: opcode
+  kind: opcode
+  opcode: true
diff --git a/arch/inst_format/utype.yaml b/arch/inst_format/utype.yaml
@@ -0,0 +1,23 @@
+
+$schema: inst_format.json#
+kind: instruction format
+name: U-type
+fields:
+- location: 31-12
+  name: imm
+  kind: immediate
+  sign_extend: true
+  left_shift: 12
+  relocations:
+  - $ref: relocation/R_RISCV_GOT_HI20.yaml#
+  - $ref: relocation/R_RISCV_TLS_GOT_HI20.yaml#
+  - $ref: relocation/R_RISCV_TLS_GD_HI20.yaml#
+  - $ref: relocation/R_RISCV_PCREL_HI20.yaml#
+  - $ref: relocation/R_RISCV_TPREL_HI20.yaml#
+  - $ref: relocation/R_RISCV_TLSDESC_HI20.yaml#
+- location: 11-7
+  name: rd
+  kind: x destination register
+- location: 6-0
+  name: opcode
+  kind: opcode
diff --git a/arch/relocation/R_RISCV_BRANCH.yaml b/arch/relocation/R_RISCV_BRANCH.yaml
@@ -0,0 +1,8 @@
+$schema: reolaction_schema.json#
+kind: relocation
+relocation_type: R_RISCV_BRANCH
+relocation_description: |
+  12-bit PC-relative branch offset
+calculation: S + A - P # calculation, using symbols defined in ABI doc 8.4.1
+number: 16   # the number of the relocation, encoded in the r_info field
+type: static # relocation type (static, dynamic, both)
diff --git a/arch/relocation/R_RISCV_JAL.yaml b/arch/relocation/R_RISCV_JAL.yaml
@@ -0,0 +1,9 @@
+$schema: reolaction_schema.json#
+kind: relocation
+location: 31|19-12|20|30-21
+relocation_type: R_RISCV_JAL
+relocation_description: |
+  20-bit PC-relative jump offset
+calculation: S + A - P # calculation, using symbols defined in ABI doc 8.4.1
+number: 17   # the number of the relocation, encoded in the r_info field
+type: static # relocation type (static, dynamic, both)
diff --git a/arch/relocation/R_RISCV_PCREL_L012_I.yaml b/arch/relocation/R_RISCV_PCREL_L012_I.yaml
@@ -1,7 +1,6 @@
 $schema: reolaction_schema.json#
 kind: relocation
-variable_name: "I-Type"
-relocation_variable_description: Specifies a field as the immediate field in an I-type instruction
+location: 31-20  # location in the instruction encoding
 relocation_type: R_RISCV_PCREL_LO12_I
 relocation_description: |
   Low 12 bits of a 32-bit PC-relative,
@@ -10,5 +9,3 @@ relocation_description: |
 calculation: S - P # calculation, using symbols defined in ABI doc 8.4.1
 number: 24   # the number of the relocation, encoded in the r_info field
 type: static # relocation type (static, dynamic, both)
-
-