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Remove vlenb register #607

Merged
merged 12 commits into from
Oct 29, 2024
Merged

Remove vlenb register #607

merged 12 commits into from
Oct 29, 2024

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rez5427
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@rez5427 rez5427 commented Oct 25, 2024

Sorry about the messy commit

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github-actions bot commented Oct 25, 2024 •
edited
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Test Results

396 tests  ±0   396 ✅ ±0   0s ⏱️ ±0s
  4 suites ±0     0 💤 ±0 
  1 files   ±0     0 ❌ ±0 

Results for commit 6a7ae1b. ± Comparison against base commit 1b2d498.

♻️ This comment has been updated with latest results.

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rez5427 commented Oct 25, 2024

fix #565

arichardson
arichardson approved these changes Oct 25, 2024
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History needs squashing change looks sensible.

model/riscv_sys_control.sail Outdated Show resolved Hide resolved
jordancarlin
jordancarlin approved these changes Oct 25, 2024
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Might be nice to define vlen as unsigned(get_vlenb()) * 8 since that is how vlenb is used so often, but that can be a later PR. This looks like a nice clean up as is.

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rez5427 commented Oct 26, 2024

fix #574

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rez5427 commented Oct 27, 2024

Might be nice to define vlen as unsigned(get_vlenb()) * 8 since that is how vlenb is used so often, but that can be a later PR. This looks like a nice clean up as is.

like this?

jordancarlin
jordancarlin approved these changes Oct 28, 2024
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like this?

Yes. Looks good to me now.

Timmmm
Timmmm approved these changes Oct 29, 2024
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Nice improvement, LGTM!

@Timmmm Timmmm merged commit 9d86f01 into riscv:master Oct 29, 2024
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@jordancarlin jordancarlin jordancarlin approved these changes

@arichardson arichardson arichardson approved these changes

@Timmmm Timmmm Timmmm approved these changes

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@rez5427 @Timmmm @arichardson @jordancarlin @Yui5427