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mt7622: reinstate the 300 MHz OPP
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Working fine at 1 V.

Signed-off-by: Rui Salvaterra <[email protected]>
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rsalvaterra committed Apr 26, 2024
1 parent e6dc2a4 commit ba3fad8
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Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -23,17 +23,11 @@
cpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
- /* Due to the bug described at the link below, remove the 300 MHz clock to avoid a low
- * voltage condition that can cause a hang when rebooting the RT3200/E8450.
- *
- * https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490
- *
- * opp-300000000 {
- * opp-hz = /bits/ 64 <300000000>;
- * opp-microvolt = <950000>;
- * };
- *
- */
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <1000000>;
+ };
+
opp-437500000 {
opp-hz = /bits/ 64 <437500000>;
opp-microvolt = <1000000>;
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -23,17 +23,11 @@
cpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
- /* Due to the bug described at the link below, remove the 300 MHz clock to avoid a low
- * voltage condition that can cause a hang when rebooting the RT3200/E8450.
- *
- * https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490
- *
- * opp-300000000 {
- * opp-hz = /bits/ 64 <300000000>;
- * opp-microvolt = <950000>;
- * };
- *
- */
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <1000000>;
+ };
+
opp-437500000 {
opp-hz = /bits/ 64 <437500000>;
opp-microvolt = <1000000>;

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