SCC Baud Rate Generator Implementation (Diagnostic Test 6 Pass) (#116)

* Adding CREF timing constant
* tx/rx asynchronous local loopback implementation that passes Diagnostic Test 6
* SCC Diagnostic Passes - Interrupts and Reset need work
* stubbed out unimplemented test code

clem_device.h

@@ -288,40 +288,6 @@ void clem_iwm_debug_stop(struct ClemensDeviceIWM *iwm);
 bool clem_smartport_bus(struct ClemensSmartPortUnit *unit, unsigned unit_count, unsigned *io_flags,
                         unsigned *out_phase, clem_clocks_time_t ts, unsigned delta_ns);
 
-/**
- * @brief
- *
- * @param scc
- */
-void clem_scc_reset(struct ClemensDeviceSCC *scc);
-
-/**
- * @brief
- *
- * @param scc
- * @param clock
- */
-void clem_scc_glu_sync(struct ClemensDeviceSCC *scc, struct ClemensClock *clock);
-
-/**
- * @brief
- *
- * @param scc
- * @param ioreg
- * @param value
- */
-void clem_scc_write_switch(struct ClemensDeviceSCC *scc, uint8_t ioreg, uint8_t value);
-
-/**
- * @brief
- *
- * @param scc
- * @param ioreg
- * @param flags
- * @return uint8_t
- */
-uint8_t clem_scc_read_switch(struct ClemensDeviceSCC *scc, uint8_t ioreg, uint8_t flags);
-
 /**
  * @brief
  *

clem_mmio.c

@@ -6,6 +6,7 @@
 
 #include "clem_device.h"
 #include "clem_mmio_types.h"
+#include "clem_scc.h"
 #include "clem_types.h"
 #include "clem_util.h"
 #include "clem_vgc.h"
@@ -1081,7 +1082,7 @@ void clem_mmio_write(ClemensMMIO *mmio, struct ClemensTimeSpec *tspec, uint8_t d
     case CLEM_MMIO_REG_SCC_A_CMD:
     case CLEM_MMIO_REG_SCC_B_DATA:
     case CLEM_MMIO_REG_SCC_A_DATA:
-        clem_scc_write_switch(&mmio->dev_scc, ioreg, data);
+        clem_scc_write_switch(&mmio->dev_scc, tspec, ioreg, data);
         break;
     case CLEM_MMIO_REG_AUDIO_CTL:
         clem_sound_write_switch(&mmio->dev_audio, ioreg, data);
@@ -1752,7 +1753,7 @@ void clem_mmio_reset(ClemensMMIO *mmio, struct ClemensTimeSpec *tspec) {
     clem_sound_reset(&mmio->dev_audio);
     clem_vgc_reset(&mmio->vgc);
     clem_iwm_reset(&mmio->dev_iwm, tspec);
-    clem_scc_reset(&mmio->dev_scc);
+    clem_scc_reset(&mmio->dev_scc, tspec);
 }
 
 void clem_mmio_init(ClemensMMIO *mmio, struct ClemensDeviceDebugger *dev_debug,

clem_mmio_defs.h

@@ -647,6 +647,10 @@
 #define CLEM_MONITOR_COLOR_RGB  0
 #define CLEM_MONITOR_COLOR_MONO 1
 
+/* Mose SCC defines are in clem_scc.h - the few that are here are required by
+   clem_mmio_types.h */
+#define CLEM_SCC_RECV_QUEUE_SIZE 3
+
 /* NTSC scanlines start at counter 7 and end at 198 (192 lines)
    VBL begins at 199 (scanline 192)
    see technote 39, 40 and clem_vgc.c for links
@@ -708,14 +712,6 @@
 #define CLEM_VGC_SCANLINE_COLORFILL_MODE     (0x20)
 #define CLEM_VGC_SCANLINE_PALETTE_INDEX_MASK (0x0f)
 
-#define CLEM_SCC_PORT_DTR        0x01
-#define CLEM_SCC_PORT_HSKI       0x02
-#define CLEM_SCC_PORT_TX_DATA_LO 0x04
-#define CLEM_SCC_PORT_TX_DATA_HI 0x08
-#define CLEM_SCC_PORT_RX_DATA_LO 0x10
-#define CLEM_SCC_PORT_RX_DATA_HI 0x20
-#define CLEM_SCC_PORT_GPI        0x40
-
 #define CLEM_ENSONIQ_OSC_CTL_FREE_MODE 0x00
 #define CLEM_ENSONIQ_OSC_CTL_M0        0x02
 #define CLEM_ENSONIQ_OSC_CTL_SYNC      0x04

clem_mmio_types.h

@@ -109,14 +109,45 @@ struct ClemensDeviceADB {
     uint32_t irq_line;     /**< IRQ flags passed to machine */
 };
 
-struct ClemensDeviceSCC {
-    clem_clocks_time_t ts_last_frame;
-
-    /** Internal state that drives how the cmd/data registers are interpreted */
+struct ClemensDeviceSCCChannel {
+    unsigned serial_port;
+
+    /** Register set */
+    uint8_t regs[16];
+    uint8_t rr0, rr1;
+    uint8_t rr3, rr8;
+    uint8_t selected_reg;
+    uint8_t txd_internal; /* Used for loopback*/
+    uint8_t rxd_error;    /* Tracks received byte and acts as the error byte */
+    uint8_t pad;
+
+    /** Applies clock mode (/1, /16, /32, /64) to calculate the master step  and edges. */
+    clem_clocks_time_t master_clock_ts;
+    clem_clocks_time_t xtal_edge_ts;
+    clem_clocks_time_t pclk_edge_ts;
+    clem_clocks_duration_t master_clock_step;
+
+    /** Data buffers - FIFO queues that mimic the Z8530 recv/xmit buffers */
+    uint8_t recv_queue[CLEM_SCC_RECV_QUEUE_SIZE];
+    uint8_t recv_err_queue[CLEM_SCC_RECV_QUEUE_SIZE];
+    uint8_t tx_byte;
+    uint8_t rx_condition; /* Special Receive Condition */
+    uint32_t tx_register;
+    uint32_t tx_shift_ctr;
+    uint32_t rx_queue_pos;
+    uint32_t rx_shift_ctr;
+    uint32_t rx_register;
+    uint32_t brg_counter; /* Bit 31 = high bit is the flip-flop state*/
     unsigned state;
-    unsigned selected_reg[2];
+};
+
+struct ClemensDeviceSCC {
+    /** Clocks, including the XTAL oscillator @ 3.6864 mhz, CREF is defined in
+        clem_shared.h */
+    clem_clocks_duration_t xtal_step;
+    clem_clocks_duration_t pclk_step;
 
-    uint8_t serial[2]; /**< See CLEM_SCC_PORT_xxx */
+    struct ClemensDeviceSCCChannel channel[2];
 
     uint32_t irq_line; /**< IRQ flags passed to machine */
 };