v0.1.0

• Optimized stall calculation, especially when a design makes many calls to submodules, by avoiding traversing the module hierarchy
• Optimized trace generation by replacing templated fprintf calls with fputs calls with precomputed strings
• Added progress meter (including estimated time remaining) for trace resolution and stall calculation steps
• Added code to the benchmarking script to generate details.txt for each benchmark, which reports the start and end cycles for each module in the module hierarchy
• Improved error reporting for failed subprocesses during trace generation by including stdout/stderr in the error message
• Fixed incorrect expected counts of FIFO reads/writes in some edge cases, which caused trace parsing to fail for some designs
• Fixed usage of relative paths during testbench compilation, which sometimes caused trace generation to fail when using relative paths to the solution directory

This release includes breaking API changes in the lightningsim.simulator module. Specifically, the Simulator.active_subcalls property has been renamed to subcalls to better reflect its actual purpose, and the Simulator.events property has been removed, having been replaced by the Simulator.subcall_inits and Simulator.stalls properties.