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fix JALR
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* fix JALR

Co-authored-by: longfangsong <[email protected]>
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zhoudian64 and longfangsong authored Apr 23, 2021
1 parent f477bd4 commit fe3e78b
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Showing 2 changed files with 8 additions and 1 deletion.
3 changes: 3 additions & 0 deletions src/main/scala/Imm.scala
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,9 @@ class Imm extends Module {
is("b00000".U) {
io.result := I
}
is("b11001".U) {
io.result := I
}
is("b01000".U) {
io.result := S
}
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6 changes: 5 additions & 1 deletion src/test/scala/SRAMTest.scala
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,11 @@ class SRAMTest(sram: SRAM) extends PeekPokeTester(sram) {

(false.B, 5.U(10.W), Vector(true.B, false.B, false.B, false.B), "h000000e9".U(32.W), "0"),
(true.B, 4.U(10.W), Vector(false.B, false.B, false.B, false.B), "h00000000".U(32.W), "hd8c7b6a5"),
(true.B, 5.U(10.W), Vector(false.B, false.B, false.B, false.B), "h00000000".U(32.W), "h000000e9"))
(true.B, 5.U(10.W), Vector(false.B, false.B, false.B, false.B), "h00000000".U(32.W), "h000000e9"),

(false.B, "h0FB8".U(12.W), Vector(true.B, true.B, true.B, true.B), "h01010101".U(32.W), "0"),
(true.B, "h0FB8".U(12.W), Vector(false.B, false.B, false.B, false.B), "h00000000".U(32.W), "h01010101")
)
for ((enable, address, mask, dataIn, expectedDataOut) <- cases) {
poke(sram.io.enable, enable)
poke(sram.io.addr, address)
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