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linux-iot2050: Update to v6.1.54-cip6[-rt3]
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Signed-off-by: Diogo Ivo <[email protected]>
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diogo-ivo committed Oct 16, 2023
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4 changes: 2 additions & 2 deletions conf/distro/iot2050-debian.conf
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Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,8 @@ DISTRO_NAME = "IOT2050 Debian System"

HOSTNAME ??= "iot2050-debian"

PREFERRED_VERSION_linux-iot2050 ?= "5.10.%"
PREFERRED_VERSION_linux-iot2050-rt ?= "5.10.%"
PREFERRED_VERSION_linux-iot2050 ?= "6.1.%"
PREFERRED_VERSION_linux-iot2050-rt ?= "6.1.%"

KERNEL_NAME ?= "cip"

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75 changes: 75 additions & 0 deletions ...s-kernel/linux/files/patches-6.1/0001-arm64-dts-ti-iot2050-Add-layout-of-OSPI-flash.patch
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@@ -0,0 +1,75 @@
From fda33bec60e688419a47c0584f426a3ab7bb8d54 Mon Sep 17 00:00:00 2001
From: Jan Kiszka <[email protected]>
Date: Thu, 19 Jan 2023 07:40:40 +0100
Subject: [PATCH 01/68] arm64: dts: ti: iot2050: Add layout of OSPI flash

Describe the layout of the OSPI flash as the latest firmware uses it.
Specifically the location of the U-Boot envs is important for userspace
in order to access it.

Signed-off-by: Jan Kiszka <[email protected]>
[Commit 12f0158f3e98 upstream]
---
.../boot/dts/ti/k3-am65-iot2050-common.dtsi | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index 32b797237581..180bfb2a9ddf 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -603,6 +603,52 @@ flash@0 {
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <2>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ seboot@0 {
+ label = "seboot";
+ reg = <0x0 0x180000>; /* 1.5M */
+ };
+
+ tispl@180000 {
+ label = "tispl";
+ reg = <0x180000 0x200000>; /* 2M */
+ };
+
+ u-boot@380000 {
+ label = "u-boot";
+ reg = <0x380000 0x300000>; /* 3M */
+ };
+
+ env@680000 {
+ label = "env";
+ reg = <0x680000 0x20000>; /* 128K */
+ };
+
+ env-backup@6a0000 {
+ label = "env.backup";
+ reg = <0x6a0000 0x20000>; /* 128K */
+ };
+
+ otpcmd@6c0000 {
+ label = "otpcmd";
+ reg = <0x6c0000 0x10000>; /* 64K */
+ };
+
+ unused@6d0000 {
+ label = "unused";
+ reg = <0x6d0000 0x7b0000>; /* 7872K */
+ };
+
+ seboot-backup@e80000 {
+ label = "seboot.backup";
+ reg = <0xe80000 0x180000>; /* 1.5M */
+ };
+ };
};
};

--
2.42.0

31 changes: 31 additions & 0 deletions ...l/linux/files/patches-6.1/0002-dt-bindings-arm-ti-Add-binding-for-Siemens-IOT2050-M.patch
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@@ -0,0 +1,31 @@
From 8d579a3d6d2a0f9482d01787a3144aabde802a1d Mon Sep 17 00:00:00 2001
From: Jan Kiszka <[email protected]>
Date: Thu, 19 Jan 2023 07:40:41 +0100
Subject: [PATCH 02/68] dt-bindings: arm: ti: Add binding for Siemens IOT2050
M.2 variant

This new variant is derived from the Advanced PG2 board, replacing the
MiniPCI slot with B and E-keyed M.2 slots.

Signed-off-by: Jan Kiszka <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
[Commit 31170b8c028f upstream]
---
Documentation/devicetree/bindings/arm/ti/k3.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml
index 28b8232e1c5b..d16231bdee6e 100644
--- a/Documentation/devicetree/bindings/arm/ti/k3.yaml
+++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml
@@ -42,6 +42,7 @@ properties:
items:
- enum:
- siemens,iot2050-advanced
+ - siemens,iot2050-advanced-m2
- siemens,iot2050-advanced-pg2
- siemens,iot2050-basic
- siemens,iot2050-basic-pg2
--
2.42.0

169 changes: 169 additions & 0 deletions ...ernel/linux/files/patches-6.1/0003-arm64-dts-ti-iot2050-Add-support-for-M.2-variant.patch
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Original file line number Diff line number Diff line change
@@ -0,0 +1,169 @@
From e637dbedf70d3a6fb2dc5f3b5fd4a43d244bc7b3 Mon Sep 17 00:00:00 2001
From: chao zeng <[email protected]>
Date: Thu, 19 Jan 2023 07:40:42 +0100
Subject: [PATCH 03/68] arm64: dts: ti: iot2050: Add support for M.2 variant

The M.2 variant comes with 2 slots, one B-keyed and another one E-keyed.
They are configured by the firmware during startup. Also the device tree
will be adjusted according to the detect or manually configured
interface mode by the firmware. The kernel only carries a single
configuration as base device tree. It has to be built with a symbols
node so that the firmware can apply overlays for the connector modes.

Signed-off-by: chao zeng <[email protected]>
[Jan: refactored to a single DT]
Signed-off-by: Jan Kiszka <[email protected]>
Reviewed-by: Siddharth Vadapalli <[email protected]>
[Commit 175357d1deed upstream]
---
arch/arm64/boot/dts/ti/Makefile | 3 +
.../dts/ti/k3-am6548-iot2050-advanced-m2.dts | 121 ++++++++++++++++++
2 files changed, 124 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 4555a5be2257..efdd3bb1e263 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -10,8 +10,11 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-m2.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb

+DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@
+
dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb

diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
new file mode 100644
index 000000000000..9400e35882a6
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) Siemens AG, 2018-2023
+ *
+ * Authors:
+ * Chao Zeng <[email protected]>
+ * Jan Kiszka <[email protected]>
+ *
+ * AM6548-based (quad-core) IOT2050 M.2 variant (based on Advanced Product
+ * Generation 2), 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30
+ *
+ * Product homepage:
+ * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
+ */
+
+#include "k3-am6548-iot2050-advanced-common.dtsi"
+#include "k3-am65-iot2050-common-pg2.dtsi"
+
+/ {
+ compatible = "siemens,iot2050-advanced-m2", "ti,am654";
+ model = "SIMATIC IOT2050 Advanced M2";
+};
+
+&mcu_r5fss0 {
+ /* lock-step mode not supported on this board */
+ ti,cluster-mode = <0>;
+};
+
+&main_pmx0 {
+ main_m2_enable_pins_default: main-m2-enable-pins-default {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */
+ >;
+ };
+
+ main_bkey_pcie_reset: main-bkey-pcie-reset {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7) /* (AG13) GPIO1_15 */
+ >;
+ };
+
+ main_pmx0_m2_config_pins_default: main-pmx0-m2-config-pins-default {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x01c8, PIN_INPUT_PULLUP, 7) /* (AE13) GPIO1_18 */
+ AM65X_IOPAD(0x01cc, PIN_INPUT_PULLUP, 7) /* (AD13) GPIO1_19 */
+ >;
+ };
+
+ main_m2_pcie_mux_control: main-m2-pcie-mux-control {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x0148, PIN_INPUT_PULLUP, 7) /* (AG22) GPIO0_82 */
+ AM65X_IOPAD(0x0160, PIN_INPUT_PULLUP, 7) /* (AE20) GPIO0_88 */
+ AM65X_IOPAD(0x0164, PIN_INPUT_PULLUP, 7) /* (AF19) GPIO0_89 */
+ >;
+ };
+};
+
+&main_pmx1 {
+ main_pmx1_m2_config_pins_default: main-pmx1-m2-config-pins-default {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x0018, PIN_INPUT_PULLUP, 7) /* (B22) GPIO1_88 */
+ AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */
+ >;
+ };
+};
+
+&main_gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &main_m2_pcie_mux_control
+ &arduino_io_d4_to_d9_pins_default
+ >;
+};
+
+&main_gpio1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &main_m2_enable_pins_default
+ &main_pmx0_m2_config_pins_default
+ &main_pmx1_m2_config_pins_default
+ &cp2102n_reset_pin_default
+ >;
+};
+
+/*
+ * Base configuration for B-key slot with PCIe x2, E-key with USB 2.0 only.
+ * Firmware switches to other modes via device tree overlays.
+ */
+
+&serdes0 {
+ assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
+ assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
+};
+
+&pcie0_rc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_bkey_pcie_reset>;
+
+ num-lanes = <2>;
+ phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>;
+ phy-names = "pcie-phy0","pcie-phy1";
+ reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&pcie1_rc {
+ status = "disabled";
+};
+
+&dwc3_0 {
+ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
+ <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
+ /delete-property/ phys;
+ /delete-property/ phy-names;
+};
+
+&usb0 {
+ maximum-speed = "high-speed";
+ /delete-property/ snps,dis-u1-entry-quirk;
+ /delete-property/ snps,dis-u2-entry-quirk;
+};
--
2.42.0

93 changes: 93 additions & 0 deletions ...ernel/linux/files/patches-6.1/0004-dt-bindings-remoteproc-Add-PRU-consumer-bindings.patch
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@@ -0,0 +1,93 @@
From 5f92864dc0c57de9b871da1e78c8c719a4762fbb Mon Sep 17 00:00:00 2001
From: Suman Anna <[email protected]>
Date: Fri, 6 Jan 2023 17:40:41 +0530
Subject: [PATCH 04/68] dt-bindings: remoteproc: Add PRU consumer bindings

Add DT schema binding for PRU consumers. The binding includes
all the common properties that can be used by different PRU consumer
or application nodes and supported by the PRU remoteproc driver.
These are used to configure the PRU hardware for specific user
applications.

The application nodes themselves should define their own bindings.

Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Suman Anna <[email protected]>
Signed-off-by: Grzegorz Jaszczyk <[email protected]>
Signed-off-by: MD Danish Anwar <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
[Commit d6e21ef31e7f upstream]
---
.../bindings/remoteproc/ti,pru-consumer.yaml | 60 +++++++++++++++++++
1 file changed, 60 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml b/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml
new file mode 100644
index 000000000000..c6d86964b72a
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/ti,pru-consumer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common TI PRU Consumer Binding
+
+maintainers:
+ - Suman Anna <[email protected]>
+
+description: |
+ A PRU application/consumer/user node typically uses one or more PRU device
+ nodes to implement a PRU application/functionality. Each application/client
+ node would need a reference to at least a PRU node, and optionally define
+ some properties needed for hardware/firmware configuration. The below
+ properties are a list of common properties supported by the PRU remoteproc
+ infrastructure.
+
+ The application nodes shall define their own bindings like regular platform
+ devices, so below are in addition to each node's bindings.
+
+properties:
+ ti,prus:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: phandles to the PRU, RTU or Tx_PRU nodes used
+ minItems: 1
+ maxItems: 6
+ items:
+ maxItems: 1
+
+ firmware-name:
+ $ref: /schemas/types.yaml#/definitions/string-array
+ minItems: 1
+ maxItems: 6
+ description: |
+ firmwares for the PRU cores, the default firmware for the core from
+ the PRU node will be used if not provided. The firmware names should
+ correspond to the PRU cores listed in the 'ti,prus' property
+
+ ti,pruss-gp-mux-sel:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 6
+ items:
+ enum: [0, 1, 2, 3, 4]
+ description: |
+ array of values for the GP_MUX_SEL under PRUSS_GPCFG register for a PRU.
+ This selects the internal muxing scheme for the PRU instance. Values
+ should correspond to the PRU cores listed in the 'ti,prus' property. The
+ GP_MUX_SEL setting is a per-slice setting (one setting for PRU0, RTU0,
+ and Tx_PRU0 on K3 SoCs). Use the same value for all cores within the
+ same slice in the associative array. If the array size is smaller than
+ the size of 'ti,prus' property, the default out-of-reset value (0) for the
+ PRU core is used.
+
+required:
+ - ti,prus
+
+additionalProperties: true
--
2.42.0

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