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u-boot: Fix the SPI and eMMC hang issue #570
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44 changes: 0 additions & 44 deletions
44
recipes-bsp/u-boot/files/0012-qspi-iot2050-Add-temporary-workaround-for-the-QSPI-i.patch
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29 changes: 29 additions & 0 deletions
29
recipes-bsp/u-boot/files/0012-spi-cadence-quadspi-Fix-error-message-on-stuck-busy-.patch
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 | ||
From: Jan Kiszka <[email protected]> | ||
Date: Mon, 30 Oct 2023 17:20:29 +0100 | ||
Subject: [PATCH] spi: cadence-quadspi: Fix error message on stuck busy state | ||
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||
We are not iterating CQSPI_REG_RETRY, we are waiting 'timeout' ms, since | ||
day 1. | ||
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||
Signed-off-by: Jan Kiszka <[email protected]> | ||
Reviewed-by: Stefan Roese <[email protected]> | ||
Reviewed-by: Jagan Teki <[email protected]> | ||
--- | ||
drivers/spi/cadence_qspi_apb.c | 3 +-- | ||
1 file changed, 1 insertion(+), 2 deletions(-) | ||
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||
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c | ||
index 9ce2c0f254f3..d033184aa466 100644 | ||
--- a/drivers/spi/cadence_qspi_apb.c | ||
+++ b/drivers/spi/cadence_qspi_apb.c | ||
@@ -171,8 +171,7 @@ static unsigned int cadence_qspi_wait_idle(void *reg_base) | ||
} | ||
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||
/* Timeout, still in busy mode. */ | ||
- printf("QSPI: QSPI is still busy after poll for %d times.\n", | ||
- CQSPI_REG_RETRY); | ||
+ printf("QSPI: QSPI is still busy after poll for %d ms.\n", timeout); | ||
return 0; | ||
} | ||
|
40 changes: 0 additions & 40 deletions
40
recipes-bsp/u-boot/files/0013-driver-iot2050-Add-a-temporary-workaround-for-the-eMMC.patch
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50 changes: 50 additions & 0 deletions
50
recipes-bsp/u-boot/files/0013-spi-cadence-quadspi-fix-potential-malfunction-after-.patch
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 | ||
From: Ronald Wahl <[email protected]> | ||
Date: Wed, 11 Dec 2024 21:51:04 +0100 | ||
Subject: [PATCH] spi: cadence-quadspi: fix potential malfunction after ~49 | ||
days uptime | ||
|
||
The get_timer function returns an unsigned long which may be calculated | ||
from the ARM system counter. This counter is reset only on a cold reset. | ||
U-boot divides this counter down to a 1000 Hz counter that will cross | ||
the 32bit barrier after a bit more than 49 days. Assigning the value to | ||
an unsigned int will truncate it on 64bit systems. | ||
Passing this truncated value back to the get_timer function will return | ||
a very large value that is certainly larger than the timeout and so will | ||
go down the error path and besides stopping U-Boot will lead to messages | ||
like | ||
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"SPI: QSPI is still busy after poll for 5000 ms." | ||
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Signed-off-by: Ronald Wahl <[email protected]> | ||
Cc: Vignesh R <[email protected]> | ||
Cc: Pratyush Yadav <[email protected]> | ||
--- | ||
drivers/spi/cadence_qspi_apb.c | 6 +++--- | ||
1 file changed, 3 insertions(+), 3 deletions(-) | ||
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diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c | ||
index d033184aa466..ecbd6f9d147d 100644 | ||
--- a/drivers/spi/cadence_qspi_apb.c | ||
+++ b/drivers/spi/cadence_qspi_apb.c | ||
@@ -152,9 +152,9 @@ static int cadence_qspi_set_protocol(struct cadence_spi_priv *priv, | ||
/* Return 1 if idle, otherwise return 0 (busy). */ | ||
static unsigned int cadence_qspi_wait_idle(void *reg_base) | ||
{ | ||
- unsigned int start, count = 0; | ||
+ unsigned long start, count = 0; | ||
/* timeout in unit of ms */ | ||
- unsigned int timeout = 5000; | ||
+ unsigned long timeout = 5000; | ||
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start = get_timer(0); | ||
for ( ; get_timer(start) < timeout ; ) { | ||
@@ -171,7 +171,7 @@ static unsigned int cadence_qspi_wait_idle(void *reg_base) | ||
} | ||
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/* Timeout, still in busy mode. */ | ||
- printf("QSPI: QSPI is still busy after poll for %d ms.\n", timeout); | ||
+ printf("QSPI: QSPI is still busy after poll for %lu ms.\n", timeout); | ||
return 0; | ||
} | ||
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42 changes: 42 additions & 0 deletions
42
recipes-bsp/u-boot/files/0014-mmc-Fix-potential-timer-value-truncation.patch
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 | ||
From: Ronald Wahl <[email protected]> | ||
Date: Wed, 11 Dec 2024 21:52:00 +0100 | ||
Subject: [PATCH] mmc: Fix potential timer value truncation | ||
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On 64bit systems the timer value might be truncated to a 32bit value | ||
causing malfunctions. For example on ARM the timer might start from 0 | ||
again only after a cold reset. The 32bit overflow occurs after a bit | ||
more than 49 days (1000 Hz counter) so booting after that time may lead | ||
to a surprise because the board might become stuck requiring a cold | ||
reset. | ||
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Signed-off-by: Ronald Wahl <[email protected]> | ||
Cc: Peng Fan <[email protected]> | ||
Cc: Jaehoon Chung <[email protected]> | ||
--- | ||
drivers/mmc/mmc.c | 5 +++-- | ||
1 file changed, 3 insertions(+), 2 deletions(-) | ||
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diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c | ||
index 31cfda288587..2779302b843e 100644 | ||
--- a/drivers/mmc/mmc.c | ||
+++ b/drivers/mmc/mmc.c | ||
@@ -713,7 +713,7 @@ static int mmc_send_op_cond(struct mmc *mmc) | ||
{ | ||
int err, i; | ||
int timeout = 1000; | ||
- uint start; | ||
+ ulong start; | ||
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/* Some cards seem to need this */ | ||
mmc_go_idle(mmc); | ||
@@ -808,7 +808,8 @@ int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) | ||
static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value, | ||
bool send_status) | ||
{ | ||
- unsigned int status, start; | ||
+ ulong start; | ||
+ unsigned int status; | ||
struct mmc_cmd cmd; | ||
int timeout_ms = DEFAULT_CMD6_TIMEOUT_MS; | ||
bool is_part_switch = (set == EXT_CSD_CMD_SET_NORMAL) && |
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@@ -16,7 +16,7 @@ Signed-off-by: Li Hua Qian <[email protected]> | |
1 file changed, 10 insertions(+), 2 deletions(-) | ||
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diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c | ||
index dff0ff89a801..99a92f44bef4 100644 | ||
index 2779302b843e..7554730a0489 100644 | ||
--- a/drivers/mmc/mmc.c | ||
+++ b/drivers/mmc/mmc.c | ||
@@ -651,8 +651,16 @@ static int sd_send_op_cond(struct mmc *mmc, bool uhs_en) | ||
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Do we still need patch 15, given patch 14?
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Actually during my speeded-up reproducing (by using a
u16 start
), I have not observed the SD card issue, this echoes the code exactly, no wrong sized timer variables are used in the SD driver part.So I think the SD issue is a different one, so I keep the patch 15.
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Wait, I actually tested the SD on an advanced device, IIRC, the SD card issue is reported on a basic device, let me try it on the basic device then let's see.
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Just tested on both PG1 & 2 basic devices, SD card booting does not have such issue pattern. So better to keep the patch 15.
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Isn't all that screaming for a closer look? I suspect
sd_send_op_cond
is just missing the same fix as__mmc_switch
andmmc_send_op_cond
receive via patch 14. Please do so, upstream first.There was a problem hiding this comment.
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The
int timeout
insd_send_op_cond
does not bind to anyget_timer
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This is correct, but it does not change the key point: Either, patch 15 is no obsolete because the root cause was found and fixed, or we should look for any remaining timer overflows that caused that issues. It is more than likely that the same root cause applies to "our" mmc issue as well.
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That's also what I thought, however, after a deep dive into the SD card calling stack (not only, I've checked almost every get_timer calling in the u-boot -- indeed we are in lucky, there are few u32 cases, and most of them are command which does not matter in our issue...), I found there is no other place to overflow the timer, besides the reported place, so this SD card issue is either a false alarm or a different issue, in this case, better to keep the patch 15, since that patch won't cause anything harmful even if it does not fix the issue.
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Tune get_time to return an overflowing value until the mmc issue reoccurs and debug the root cause / validate that it is fixed by patch 14. Just keeping the hack of patch 15 is not really the way forward anymore, I would say.