[docs] add links to online software reference

docs/datasheet/soc_bootrom.adoc

@@ -3,7 +3,7 @@
 ==== Bootloader ROM (BOOTROM)
 
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+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_boot_rom.vhd         | default platform-agnostic bootloader ROM
 |                         | neorv32_bootloader_image.vhd | initialization image (a VHDL package)

docs/datasheet/soc_cfs.adoc

@@ -3,11 +3,11 @@
 ==== Custom Functions Subsystem (CFS)
 
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+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_cfs.vhd |
-| Software driver files:  | neorv32_cfs.c |
-|                         | neorv32_cfs.h |
+| Software driver files:  | neorv32_cfs.c | link:https://stnolting.github.io/neorv32/sw/neorv32__cfs_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_cfs.h | link:https://stnolting.github.io/neorv32/sw/neorv32__cfs_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `cfs_in_i`  | custom input conduit
 |                         | `cfs_out_o` | custom output conduit
 | Configuration generics: | `IO_CFS_EN`        | implement CFS when `true`

docs/datasheet/soc_clint.adoc

@@ -3,11 +3,11 @@
 ==== Core Local Interruptor (CLINT)
 
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+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_clint.vhd |
-| Software driver files:  | neorv32_clint.c   |
-|                         | neorv32_clint.h   |
+| Software driver files:  | neorv32_clint.c   | link:https://stnolting.github.io/neorv32/sw/neorv32__clint_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_clint.h   | link:https://stnolting.github.io/neorv32/sw/neorv32__clint_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `mtime_irq_i`     | RISC-V machine timer IRQ if CLINT is **not** implemented
 |                         | `msw_irq_i`       | RISC-V software IRQ if CLINT is **not** implemented
 |                         | `mtime_time_o`    | Current system time (from CLINT's MTIMER)

docs/datasheet/soc_crc.adoc

@@ -3,11 +3,11 @@
 ==== Cyclic Redundancy Check (CRC)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_crc.vhd |
-| Software driver files:  | neorv32_crc.c |
-|                         | neorv32_crc.h |
+| Software driver files:  | neorv32_crc.c | link:https://stnolting.github.io/neorv32/sw/neorv32__crc_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_crc.h | link:https://stnolting.github.io/neorv32/sw/neorv32__crc_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | none |
 | Configuration generics: | `IO_CRC_EN` | implement CRC module when `true`
 | CPU interrupts:         | none |

docs/datasheet/soc_dcache.adoc

@@ -3,7 +3,7 @@
 ==== Processor-Internal Data Cache (dCACHE)
 
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+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_cache.vhd   | Generic cache module
 | Software driver files:  | none                | _implicitly used_

docs/datasheet/soc_dma.adoc

@@ -3,11 +3,11 @@
 ==== Direct Memory Access Controller (DMA)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_dma.vhd |
-| Software driver files:  | neorv32_dma.c |
-|                         | neorv32_dma.h |
+| Software driver files:  | neorv32_dma.c | link:https://stnolting.github.io/neorv32/sw/neorv32__dma_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_dma.h | link:https://stnolting.github.io/neorv32/sw/neorv32__dma_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | none |
 | Configuration generics: | `IO_DMA_EN` | implement DMA when `true`
 | CPU interrupts:         | fast IRQ channel 10 | DMA transfer done (see <<_processor_interrupts>>)

docs/datasheet/soc_dmem.adoc

@@ -3,7 +3,7 @@
 ==== Data Memory (DMEM)
 
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+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_dmem.vhd    | default platform-agnostic data memory
 | Software driver files:  | none                | _implicitly used_

docs/datasheet/soc_gpio.adoc

@@ -3,11 +3,11 @@
 ==== General Purpose Input and Output Port (GPIO)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_gpio.vhd |
-| Software driver files:  | neorv32_gpio.c |
-|                         | neorv32_gpio.h |
+| Software driver files:  | neorv32_gpio.c | link:https://stnolting.github.io/neorv32/sw/neorv32__gpio_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_gpio.h | link:https://stnolting.github.io/neorv32/sw/neorv32__gpio_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `gpio_o` | 64-bit parallel output port
 |                         | `gpio_i` | 64-bit parallel input port
 | Configuration generics: | `IO_GPIO_NUM` | number of input/output pairs to implement (0..64)

docs/datasheet/soc_gptmr.adoc

@@ -3,11 +3,11 @@
 ==== General Purpose Timer (GPTMR)
 
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+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_gptmr.vhd |
-| Software driver files:  | neorv32_gptmr.c |
-|                         | neorv32_gptmr.h |
+| Software driver files:  | neorv32_gptmr.c | link:https://stnolting.github.io/neorv32/sw/neorv32__gptmr_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_gptmr.h | link:https://stnolting.github.io/neorv32/sw/neorv32__gptmr_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | none |
 | Configuration generics: | `IO_GPTMR_EN` | implement general purpose timer when `true`
 | CPU interrupts:         | fast IRQ channel 12 | timer interrupt (see <<_processor_interrupts>>)

docs/datasheet/soc_icache.adoc

@@ -3,7 +3,7 @@
 ==== Processor-Internal Instruction Cache (iCACHE)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_cache.vhd   | Generic cache module
 | Software driver files:  | none                | _implicitly used_

docs/datasheet/soc_imem.adoc

@@ -3,7 +3,7 @@
 ==== Instruction Memory (IMEM)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_imem.vhd              | default platform-agnostic instruction memory (RAM or ROM)
 |                         | neorv32_application_image.vhd | initialization image (a VHDL package)

docs/datasheet/soc_neoled.adoc

@@ -3,11 +3,11 @@
 ==== Smart LED Interface (NEOLED)
 
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+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_neoled.vhd |
-| Software driver files:  | neorv32_neoled.c |
-|                         | neorv32_neoled.h |
+| Software driver files:  | neorv32_neoled.c | link:https://stnolting.github.io/neorv32/sw/neorv32__neoled_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_neoled.h | link:https://stnolting.github.io/neorv32/sw/neorv32__neoled_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `neoled_o` | 1-bit serial data output
 | Configuration generics: | `IO_NEOLED_EN`      | implement NEOLED controller when `true`
 |                         | `IO_NEOLED_TX_FIFO` | TX FIFO depth, has to be a power of 2, min 1

docs/datasheet/soc_onewire.adoc

@@ -3,11 +3,12 @@
 ==== One-Wire Serial Interface Controller (ONEWIRE)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_onewire.vhd |
-| Software driver files:  | neorv32_onewire.c |
-|                         | neorv32_onewire.h |
+| Software driver files:  | neorv32_onewire.c | link:https://stnolting.github.io/neorv32/sw/neorv32__onewire_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_onewire.h | link:https://stnolting.github.io/neorv32/sw/neorv32__onewire_8h.html[Online software reference (Doxygen)]
+| Software reference:     | link:https://stnolting.github.io/neorv32/sw/neorv32__onewire_8h.html[Online Doxygen] |
 | Top entity ports:       | `onewire_i` | 1-bit 1-wire bus sense input
 |                         | `onewire_o` | 1-bit 1-wire bus output (pull low only)
 | Configuration generics: | `IO_ONEWIRE_EN`     | implement ONEWIRE interface controller when `true`

docs/datasheet/soc_pwm.adoc

@@ -3,11 +3,11 @@
 ==== Pulse-Width Modulation Controller (PWM)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_pwm.vhd |
-| Software driver files:  | neorv32_pwm.c |
-|                         | neorv32_pwm.h |
+| Software driver files:  | neorv32_pwm.c | link:https://stnolting.github.io/neorv32/sw/neorv32__pwm_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_pwm.h | link:https://stnolting.github.io/neorv32/sw/neorv32__pwm_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `pwm_o` | PWM output channels (16-bit)
 | Configuration generics: | `IO_PWM_NUM_CH` | number of PWM channels to implement (0..16)
 | CPU interrupts:         | none |

docs/datasheet/soc_sdi.adoc

@@ -3,11 +3,11 @@
 ==== Serial Data Interface Controller (SDI)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_sdi.vhd |
-| Software driver files:  | neorv32_sdi.c |
-|                         | neorv32_sdi.h |
+| Software driver files:  | neorv32_sdi.c | link:https://stnolting.github.io/neorv32/sw/neorv32__sdi_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_sdi.h | link:https://stnolting.github.io/neorv32/sw/neorv32__sdi_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `sdi_clk_i` | 1-bit serial clock input
 |                         | `sdi_dat_o` | 1-bit serial data output
 |                         | `sdi_dat_i` | 1-bit serial data input

docs/datasheet/soc_slink.adoc

@@ -3,11 +3,11 @@
 ==== Stream Link Interface (SLINK)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_slink.vhd   |
-| Software driver files:  | neorv32_slink.c     |
-|                         | neorv32_slink.h     |
+| Software driver files:  | neorv32_slink.c     | link:https://stnolting.github.io/neorv32/sw/neorv32__slink_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_slink.h     | link:https://stnolting.github.io/neorv32/sw/neorv32__slink_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `slink_rx_dat_i`    | RX link data (32-bit)
 |                         | `slink_rx_src_i`    | RX routing information (4-bit)
 |                         | `slink_rx_val_i`    | RX link data valid (1-bit)

docs/datasheet/soc_spi.adoc

@@ -3,11 +3,11 @@
 ==== Serial Peripheral Interface Controller (SPI)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_spi.vhd |
-| Software driver files:  | neorv32_spi.c |
-|                         | neorv32_spi.h |
+| Software driver files:  | neorv32_spi.c | link:https://stnolting.github.io/neorv32/sw/neorv32__spi_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_spi.h | link:https://stnolting.github.io/neorv32/sw/neorv32__spi_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `spi_clk_o` | 1-bit serial clock output
 |                         | `spi_dat_o` | 1-bit serial data output
 |                         | `spi_dat_i` | 1-bit serial data input

docs/datasheet/soc_sysinfo.adoc

@@ -3,10 +3,10 @@
 ==== System Configuration Information Memory (SYSINFO)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_sysinfo.vhd |
-| Software driver files:  | neorv32_sysinfo.h |
+| Software driver files:  | neorv32_sysinfo.h | link:https://stnolting.github.io/neorv32/sw/neorv32__sysinfo_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | none |
 | Configuration generics: | * | most of the top's configuration generics
 | CPU interrupts:         | none |

docs/datasheet/soc_trng.adoc

@@ -3,11 +3,11 @@
 ==== True Random-Number Generator (TRNG)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_trng.vhd |
-| Software driver files:  | neorv32_trng.c |
-|                         | neorv32_trng.h |
+| Software driver files:  | neorv32_trng.c | link:https://stnolting.github.io/neorv32/sw/neorv32__trng_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_trng.h | link:https://stnolting.github.io/neorv32/sw/neorv32__trng_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | none |
 | Configuration generics: | `IO_TRNG_EN`   | implement TRNG when `true`
 |                         | `IO_TRNG_FIFO` | data FIFO depth, min 1, has to be a power of two

docs/datasheet/soc_twd.adoc

@@ -3,11 +3,11 @@
 ==== Two-Wire Serial Device Controller (TWD)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_twd.vhd    |
-| Software driver files:  | neorv32_twd.c      |
-|                         | neorv32_twd.h      |
+| Software driver files:  | neorv32_twd.c      | link:https://stnolting.github.io/neorv32/sw/neorv32__twd_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_twd.h      | link:https://stnolting.github.io/neorv32/sw/neorv32__twd_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `twd_sda_i`        | 1-bit serial data line sense input
 |                         | `twd_sda_o`        | 1-bit serial data line output (pull low only)
 |                         | `twd_scl_i`        | 1-bit serial clock line sense input

docs/datasheet/soc_twi.adoc

@@ -3,11 +3,11 @@
 ==== Two-Wire Serial Interface Controller (TWI)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_twi.vhd    |
-| Software driver files:  | neorv32_twi.c      |
-|                         | neorv32_twi.h      |
+| Software driver files:  | neorv32_twi.c      | link:https://stnolting.github.io/neorv32/sw/neorv32__twi_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_twi.h      | link:https://stnolting.github.io/neorv32/sw/neorv32__twi_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `twi_sda_i`        | 1-bit serial data line sense input
 |                         | `twi_sda_o`        | 1-bit serial data line output (pull low only)
 |                         | `twi_scl_i`        | 1-bit serial clock line sense input

docs/datasheet/soc_uart.adoc

@@ -3,11 +3,11 @@
 ==== Primary Universal Asynchronous Receiver and Transmitter (UART0)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_uart.vhd |
-| Software driver files:  | neorv32_uart.c |
-|                         | neorv32_uart.h |
+| Software driver files:  | neorv32_uart.c | link:https://stnolting.github.io/neorv32/sw/neorv32__uart_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_uart.h | link:https://stnolting.github.io/neorv32/sw/neorv32__uart_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `uart0_txd_o` | serial transmitter output
 |                         | `uart0_rxd_i` | serial receiver input
 |                         | `uart0_rts_o` | flow control: RX ready to receive, low-active

docs/datasheet/soc_wdt.adoc

@@ -3,11 +3,11 @@
 ==== Watchdog Timer (WDT)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_wdt.vhd |
-| Software driver files:  | neorv32_wdt.c |
-|                         | neorv32_wdt.h |
+| Software driver files:  | neorv32_wdt.c | link:https://stnolting.github.io/neorv32/sw/neorv32__wdt_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_wdt.h | link:https://stnolting.github.io/neorv32/sw/neorv32__wdt_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | none |
 | Configuration generics: | `IO_WDT_EN` | implement watchdog when `true`
 | CPU interrupts:         | none |

docs/datasheet/soc_xbus.adoc

@@ -3,7 +3,7 @@
 ==== Processor-External Bus Interface (XBUS)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_xbus.vhd        | External bus gateway
 |                         | neorv32_cache.vhd       | Generic cache module

docs/datasheet/soc_xip.adoc

@@ -3,12 +3,12 @@
 ==== Execute In Place Module (XIP)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_xip.vhd        | XIP module
 |                         | neorv32_cache.vhd      | Generic cache module
-| Software driver files:  | neorv32_xip.c          |
-|                         | neorv32_xip.h          |
+| Software driver files:  | neorv32_xip.c          | link:https://stnolting.github.io/neorv32/sw/neorv32__xip_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_xip.h          | link:https://stnolting.github.io/neorv32/sw/neorv32__xip_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `xip_csn_o`            | 1-bit chip select, low-active
 |                         | `xip_clk_o`            | 1-bit serial clock output
 |                         | `xip_dat_i`            | 1-bit serial data input

docs/datasheet/soc_xirq.adoc

@@ -3,11 +3,11 @@
 ==== External Interrupt Controller (XIRQ)
 
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-[frame="topbot",grid="none"]
+[grid="none"]
 |=======================
 | Hardware source files:  | neorv32_xirq.vhd   |
-| Software driver files:  | neorv32_xirq.c     |
-|                         | neorv32_xirq.h     |
+| Software driver files:  | neorv32_xirq.c     | link:https://stnolting.github.io/neorv32/sw/neorv32__xirq_8c.html[Online software reference (Doxygen)]
+|                         | neorv32_xirq.h     | link:https://stnolting.github.io/neorv32/sw/neorv32__xirq_8h.html[Online software reference (Doxygen)]
 | Top entity ports:       | `xirq_i`           | External interrupts input (32-bit)
 | Configuration generics: | `XIRQ_NUM_CH`      | Number of external IRQ channels to implement (0..32)
 | CPU interrupts:         | fast IRQ channel 8 | XIRQ (see <<_processor_interrupts>>)