{sw/lib] comment fixes

stnolting · Jan 10, 2025 · 4a22e0e · 4a22e0e
1 parent f6eb742
commit 4a22e0e
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Showing 2 changed files with 4 additions and 12 deletions.
diff --git a/sw/lib/source/neorv32_spi.c b/sw/lib/source/neorv32_spi.c
@@ -1,18 +1,14 @@
 // ================================================================================ //
 // The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32              //
 // Copyright (c) NEORV32 contributors.                                              //
-// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved.                  //
+// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved.                  //
 // Licensed under the BSD-3-Clause license, see LICENSE for details.                //
 // SPDX-License-Identifier: BSD-3-Clause                                            //
 // ================================================================================ //
 
 /**
  * @file neorv32_spi.c
  * @brief Serial peripheral interface controller (SPI) HW driver source file.
- *
- * @note These functions should only be used if the SPI unit was synthesized (IO_SPI_EN = true).
- *
- * @see https://stnolting.github.io/neorv32/sw/files.html
  */
 
 #include <neorv32.h>
@@ -41,7 +37,7 @@ int neorv32_spi_available(void) {
  * @prama[in] cdiv Clock divider (0..15).
  * @param[in] clk_phase Clock phase (0=sample on rising edge, 1=sample on falling edge).
  * @param[in] clk_polarity Clock polarity (when idle).
- * @param[in] irq_mask Interrupt configuration mask (CTRL's irq_* bits).
+ * @param[in] irq_mask Interrupt configuration bit mask (CTRL's irq_* bits).
  **************************************************************************/
 void neorv32_spi_setup(int prsc, int cdiv, int clk_phase, int clk_polarity, uint32_t irq_mask) {
 

diff --git a/sw/lib/source/neorv32_uart.c b/sw/lib/source/neorv32_uart.c
@@ -1,18 +1,14 @@
 // ================================================================================ //
 // The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32              //
 // Copyright (c) NEORV32 contributors.                                              //
-// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved.                  //
+// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved.                  //
 // Licensed under the BSD-3-Clause license, see LICENSE for details.                //
 // SPDX-License-Identifier: BSD-3-Clause                                            //
 // ================================================================================ //
 
 /**
  * @file neorv32_uart.c
  * @brief Universal asynchronous receiver/transmitter (UART0/UART1) HW driver source file.
- *
- * @note These functions should only be used if the UART0/UART1 unit was synthesized.
- *
- * @see https://stnolting.github.io/neorv32/sw/files.html
  */
 
 #include <neorv32.h>
@@ -69,7 +65,7 @@ int neorv32_uart_available(neorv32_uart_t *UARTx) {
  *
  * @param[in,out] UARTx Hardware handle to UART register struct, #neorv32_uart_t.
  * @param[in] baudrate Targeted BAUD rate (e.g. 19200).
- * @param[in] irq_mask Interrupt configuration mask (CTRL's irq_* bits).
+ * @param[in] irq_mask Interrupt configuration bit mask (CTRL's irq_* bits).
  **************************************************************************/
 void neorv32_uart_setup(neorv32_uart_t *UARTx, uint32_t baudrate, uint32_t irq_mask) {