cleanups

stnolting · Dec 15, 2024 · ba8b92c · ba8b92c
1 parent fca9fb8
commit ba8b92c
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Showing 5 changed files with 5 additions and 5 deletions.
diff --git a/rtl/core/neorv32_top.vhd b/rtl/core/neorv32_top.vhd
@@ -56,7 +56,7 @@ entity neorv32_top is
     RISCV_ISA_Zknd        : boolean                        := false;       -- implement cryptography NIST AES decryption extension
     RISCV_ISA_Zkne        : boolean                        := false;       -- implement cryptography NIST AES encryption extension
     RISCV_ISA_Zknh        : boolean                        := false;       -- implement cryptography NIST hash extension
-    RISCV_ISA_Zksed       : boolean                        := false;       -- implement ShangMi block cypher extension
+    RISCV_ISA_Zksed       : boolean                        := false;       -- implement ShangMi block cipher extension
     RISCV_ISA_Zksh        : boolean                        := false;       -- implement ShangMi hash extension
     RISCV_ISA_Zmmul       : boolean                        := false;       -- implement multiply-only M sub-extension
     RISCV_ISA_Zxcfu       : boolean                        := false;       -- implement custom (instr.) functions unit

diff --git a/rtl/core/neorv32_twd.vhd b/rtl/core/neorv32_twd.vhd
@@ -351,7 +351,7 @@ begin
             engine.state <= S_ADDR;
           end if;
 
-        when S_ADDR => -- sample address and R/W bit and check if address match
+        when S_ADDR => -- sample address + R/W bit and check if address match
         -- ------------------------------------------------------------
           if (ctrl.enable = '0') or (smp.stop = '1') then -- disabled or stop-condition received?
             engine.state <= S_IDLE;

diff --git a/sw/lib/include/neorv32_twd.h b/sw/lib/include/neorv32_twd.h
@@ -39,7 +39,7 @@ enum NEORV32_TWD_CTRL_enum {
   TWD_CTRL_EN           =  0, /**< TWD control register(0)  (r/w): TWD enable */
   TWD_CTRL_CLR_RX       =  1, /**< TWD control register(1)  (-/w): Clear RX FIFO, flag auto-clears */
   TWD_CTRL_CLR_TX       =  2, /**< TWD control register(2)  (-/w): Clear TX FIFO, flag auto-clears */
-  TWD_CTRL_FESL         =  3, /**< TWD control register(3)  (r/w): Bus sample clock / filter select */
+  TWD_CTRL_FSEL         =  3, /**< TWD control register(3)  (r/w): Bus sample clock / filter select */
   TWD_CTRL_DEV_ADDR0    =  4, /**< TWD control register(4)  (r/w): Device address (7-bit), LSB */
   TWD_CTRL_DEV_ADDR6    = 10, /**< TWD control register(10) (r/w): Device address (7-bit), MSB */
   TWD_CTRL_IRQ_RX_AVAIL = 11, /**< TWD control register(11) (r/w): IRQ if RX FIFO data available */

diff --git a/sw/lib/source/neorv32_twd.c b/sw/lib/source/neorv32_twd.c
@@ -50,7 +50,7 @@ void neorv32_twd_setup(int device_addr, int fsel, int irq_rx_avail, int irq_rx_f
   uint32_t ctrl = 0;
   ctrl |= ((uint32_t)(               0x01) << TWD_CTRL_EN);
   ctrl |= ((uint32_t)(device_addr  & 0x7f) << TWD_CTRL_DEV_ADDR0);
-  ctrl |= ((uint32_t)(fsel         & 0x01) << TWD_CTRL_FESL);
+  ctrl |= ((uint32_t)(fsel         & 0x01) << TWD_CTRL_FSEL);
   ctrl |= ((uint32_t)(irq_rx_avail & 0x01) << TWD_CTRL_IRQ_RX_AVAIL);
   ctrl |= ((uint32_t)(irq_rx_full  & 0x01) << TWD_CTRL_IRQ_RX_FULL);
   ctrl |= ((uint32_t)(irq_tx_empty & 0x01) << TWD_CTRL_IRQ_TX_EMPTY);

diff --git a/sw/svd/neorv32.svd b/sw/svd/neorv32.svd
@@ -1352,7 +1352,7 @@
               <description>Clear TX FIFO, flag auto-clears</description>
             </field>
             <field>
-              <name>TWD_CTRL_FESL</name>
+              <name>TWD_CTRL_FSEL</name>
               <bitRange>[3:3]</bitRange>
               <description>Bus sample clock / filter select</description>
             </field>