[mmu] make TLB write-only

let's save some hardware here
stnolting · Feb 4, 2024 · d72e73b · d72e73b
1 parent 2303c35
commit d72e73b
Showing 1 changed file with 1 addition and 40 deletions.
diff --git a/rtl/core/neorv32_cpu_mmu.vhd b/rtl/core/neorv32_cpu_mmu.vhd
@@ -103,8 +103,6 @@ architecture neorv32_cpu_mmu_rtl of neorv32_cpu_mmu is
   signal mmu_we     : std_ulogic_vector(1 downto 0); -- MMU table write enable
   signal mmu_id_sel : std_ulogic; -- instruction/data TLB select
   signal mmu_index  : std_ulogic_vector(index_size_f(num_ptes_c)-1 downto 0); -- PTE select
-  signal mmu_vpn_rd : std_ulogic_vector(XLEN-1 downto 0); -- VPN read-back
-  signal mmu_pte_rd : std_ulogic_vector(XLEN-1 downto 0); -- PTE read-back
 
   -- table lookup --
   type lookup_t is record
@@ -159,7 +157,7 @@ begin
   end process csr_write;
 
   -- read access --
-  csr_read: process(csr_en, csr_addr_i, atp_en, mmu_index, mmu_id_sel, mmu_vpn_rd, mmu_pte_rd)
+  csr_read: process(csr_en, csr_addr_i, atp_en, mmu_index, mmu_id_sel)
   begin
     csr_rdata_o <= (others => '0'); -- default
     if (csr_en = '1') then
@@ -169,10 +167,6 @@ begin
         when "01" => -- virtual page number
           csr_rdata_o(mmu_index'range) <= mmu_index;
           csr_rdata_o(31)              <= mmu_id_sel;
-        when "10" => -- virtual page number
-          csr_rdata_o <= mmu_vpn_rd;
-        when "11" => -- page table entry
-          csr_rdata_o <= mmu_pte_rd;
         when others => -- undefined
           csr_rdata_o <= (others => '0');
       end case;
@@ -219,39 +213,6 @@ begin
     end if;
   end process mmu_update;
 
-  -- read-back --
-  mmu_readback: process(rstn_i, clk_i)
-  begin
-    if (rstn_i = '0') then
-      mmu_vpn_rd <= (others => '0');
-      mmu_pte_rd <= (others => '0');
-    elsif rising_edge(clk_i) then
-      if (mmu_id_sel = '0') then -- instruction TLB
-        -- virtual page number --
-        mmu_vpn_rd(XLEN-1 downto 30)          <= (others => '0'); -- 32-bit physical address space only
-        mmu_vpn_rd(29 downto csr_vtg_lsb_c)   <= i_tlb_vtg(to_integer(unsigned(mmu_index))); -- page number MSBs (tag)
-        mmu_vpn_rd(csr_vtg_lsb_c-1 downto 10) <= mmu_index; -- page number LSBs (index)
-        mmu_vpn_rd(9 downto 0)                <= (others => '0'); -- unused
-        -- page table entry --
-        mmu_pte_rd(XLEN-1 downto 30)          <= (others => '0'); -- 32-bit physical address space only
-        mmu_pte_rd(29 downto 10)              <= i_tlb_ppn(to_integer(unsigned(mmu_index))); -- physical page number
-        mmu_pte_rd(9 downto 8)                <= "00"; -- RSW: reserved
-        mmu_pte_rd(7 downto 0)                <= i_tlb_att(to_integer(unsigned(mmu_index)));
-      else -- data TLB
-        -- virtual page number --
-        mmu_vpn_rd(XLEN-1 downto 30)          <= (others => '0'); -- 32-bit physical address space only
-        mmu_vpn_rd(29 downto csr_vtg_lsb_c)   <= d_tlb_vtg(to_integer(unsigned(mmu_index))); -- page number MSBs (tag)
-        mmu_vpn_rd(csr_vtg_lsb_c-1 downto 10) <= mmu_index; -- page number LSBs (index)
-        mmu_vpn_rd(9 downto 0)                <= (others => '0'); -- unused
-        -- page table entry --
-        mmu_pte_rd(XLEN-1 downto 30)          <= (others => '0'); -- 32-bit physical address space only
-        mmu_pte_rd(29 downto 10)              <= d_tlb_ppn(to_integer(unsigned(mmu_index))); -- physical page number
-        mmu_pte_rd(9 downto 8)                <= "00"; -- RSW: reserved
-        mmu_pte_rd(7 downto 0)                <= d_tlb_att(to_integer(unsigned(mmu_index)));
-      end if;
-    end if;
-  end process mmu_readback;
-
 
   -- TLB Lookup -----------------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------