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Addition of SRC Lite module, which only supports a subset of conversions supported by the SRC module. 48 -> 16kHz 44.1 -> 16 kHz 32 -> 16 kHz 44.1 -> 48 Signed-off-by: Fabiola Kwasowiec <[email protected]>
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/* SPDX-License-Identifier: BSD-3-Clause | ||
* | ||
* Copyright(c) 2023 Intel Corporation. All rights reserved. | ||
* | ||
*/ | ||
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#ifndef __SOF_AUDIO_COEFFICIENTS_SRC_SRC_IPC4_INT32_DEFINE_H__ | ||
#define __SOF_AUDIO_COEFFICIENTS_SRC_SRC_IPC4_INT32_DEFINE_H__ | ||
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/* SRC constants */ | ||
#define MAX_FIR_DELAY_SIZE 730 | ||
#define MAX_OUT_DELAY_SIZE 900 | ||
#define MAX_BLK_IN 80 | ||
#define MAX_BLK_OUT 40 | ||
#define NUM_IN_FS 16 | ||
#define NUM_OUT_FS 10 | ||
#define STAGE1_TIMES_MAX 32 | ||
#define STAGE2_TIMES_MAX 32 | ||
#define STAGE_BUF_SIZE 672 | ||
#define NUM_ALL_COEFFICIENTS 69224 | ||
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#endif /* __SOF_AUDIO_COEFFICIENTS_SRC_SRC_IPC4_INT32_DEFINE_H__ */ |
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/* SPDX-License-Identifier: BSD-3-Clause | ||
* | ||
* Copyright(c) 2023 Intel Corporation. All rights reserved. | ||
* | ||
*/ | ||
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/** \cond GENERATED_BY_TOOLS_TUNE_SRC */ | ||
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#ifndef __SOF_AUDIO_COEFFICIENTS_SRC_src_IPC4_INT32_TABLE_H__ | ||
#define __SOF_AUDIO_COEFFICIENTS_SRC_src_IPC4_INT32_TABLE_H__ | ||
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/* SRC conversions */ | ||
#include "src_ipc4_int32_1_2_4535_5000.h" | ||
#include "src_ipc4_int32_10_21_3455_5000.h" | ||
#include "src_ipc4_int32_1_3_4535_5000.h" | ||
#include "src_ipc4_int32_3_2_4535_5000.h" | ||
#include "src_ipc4_int32_8_7_4535_5000.h" | ||
#include "src_ipc4_int32_16_21_4535_5000.h" | ||
#include "src_ipc4_int32_20_21_4167_5000.h" | ||
#include "../src.h" | ||
#include <stdint.h> | ||
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/* SRC table */ | ||
int32_t src_fir_one = 1073741824; | ||
struct src_stage src_int32_1_1_0_0 = { 0, 0, 1, 1, 1, 1, 1, 0, -1, &src_fir_one }; | ||
struct src_stage src_int32_0_0_0_0 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, &src_fir_one }; | ||
int src_in_fs[3] = { 32000, 44100, 48000}; | ||
int src_out_fs[2] = {16000, 48000}; | ||
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struct src_stage *src_table1[2][3] = { | ||
{ &src_int32_1_2_4535_5000, &src_int32_10_21_3455_5000, | ||
&src_int32_1_3_4535_5000 }, | ||
{ &src_int32_3_2_4535_5000, &src_int32_8_7_4535_5000, &src_int32_1_1_0_0 } | ||
}; | ||
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struct src_stage *src_table2[2][3] = { | ||
{ &src_int32_1_1_0_0, &src_int32_16_21_4535_5000, &src_int32_1_1_0_0 }, | ||
{ &src_int32_1_1_0_0, &src_int32_20_21_4167_5000, &src_int32_1_1_0_0 } | ||
}; | ||
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#endif /* __SOF_AUDIO_COEFFICIENTS_SRC_src_IPC4_INT32_TABLE_H__ */ | ||
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/** \endcond */ |
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// SPDX-License-Identifier: BSD-3-Clause | ||
// | ||
// Copyright(c) 2023 Intel Corporation. All rights reserved. | ||
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#include <rtos/init.h> | ||
#include "src.h" | ||
#include "src_config.h" | ||
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#define SRC_LITE 1 | ||
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LOG_MODULE_REGISTER(src_lite, CONFIG_SOF_LOG_LEVEL); | ||
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static const struct module_interface src_lite_interface = { | ||
.init = src_init, | ||
.prepare = src_prepare, | ||
.process = src_process, | ||
.is_ready_to_process = src_is_ready_to_process, | ||
.set_configuration = src_set_config, | ||
.get_configuration = src_get_config, | ||
.reset = src_reset, | ||
.free = src_free, | ||
}; | ||
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DECLARE_SOF_RT_UUID("src_lite", src_lite_uuid, 0x33441051, 0x44CD, 0x466A, | ||
0x83, 0xA3, 0x17, 0x84, 0x78, 0x70, 0x8A, 0xEA); | ||
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DECLARE_TR_CTX(src_lite_tr, SOF_UUID(src_lite_uuid), LOG_LEVEL_INFO); | ||
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DECLARE_MODULE_ADAPTER(src_lite_interface, src_lite_uuid, src_lite_tr); | ||
SOF_MODULE_INIT(src_lite, sys_comp_module_src_lite_interface_init); |
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