Skip to content

Commit

Permalink
Fix flaky cagg_insert
Browse files Browse the repository at this point in the history
Isolation test `cagg_insert` is flaky because refresh steps can
complete in any order. Adding constraints so that completion is
reported in the same order in all test runs.
  • Loading branch information
mkindahl committed Sep 28, 2023
1 parent 0da18a9 commit 4bd2dc1
Showing 1 changed file with 5 additions and 5 deletions.
10 changes: 5 additions & 5 deletions tsl/test/isolation/specs/cagg_insert.spec
Original file line number Diff line number Diff line change
Expand Up @@ -123,15 +123,15 @@ step "LockMatInval" { BEGIN; LOCK TABLE _timescaledb_catalog.continuous_aggs_mat
step "UnlockMatInval" { ROLLBACK; }

#only one refresh
permutation "LockInvalThrEx" "Refresh" "Refresh2" "Refresh3" "UnlockInvalThrEx"
permutation "LockInvalThrEx" Refresh Refresh2(Refresh) Refresh3(Refresh,Refresh2) "UnlockInvalThrEx"

#refresh and insert do not block each other once refresh is out of the
#first transaction where it moves the invalidation threshold
permutation "Ib" "LockCagg1" "I1" "Refresh" "Ic" "UnLockCagg1"
permutation "Ib" "LockCagg1" "Refresh" "I1" "Ic" "UnLockCagg1"

permutation "I2b" "LockCagg2" "I21" "Refresh" "Refresh3" "I2c" "UnLockCagg2"
permutation "I2b" "LockCagg2" "Refresh3" "Refresh" "I21" "I2c" "UnLockCagg2"
permutation "I2b" "LockCagg2" "I21" Refresh Refresh3(Refresh) "I2c" "UnLockCagg2"
permutation "I2b" "LockCagg2" Refresh3 Refresh(Refresh3) "I21" "I2c" "UnLockCagg2"

#refresh and select can run concurrently. Refresh blocked only by lock on
# cagg's materialized hypertable. Needs RowExclusive for 2nd txn.
Expand Down Expand Up @@ -159,5 +159,5 @@ permutation "Refresh" "SV1" "LockMatInval" "Refresh1" "Ib" "I1" "LockInvalThrEx"
permutation "I1" "Refresh" "LockInval" "Refresh" "Sb" "S1" "Sc" "UnlockInval"
permutation "I1" "Refresh" "LockInval" "Sb" "S1" "Refresh" "Sc" "UnlockInval"

permutation "I1" "I21" "Refresh1" "Refresh2" "Refresh3"
permutation "I1" "I2b" "I21" "Refresh2" "Refresh3" "I2c" "Refresh3"
permutation "I1" "I21" Refresh1 Refresh2(Refresh1) Refresh3(Refresh1,Refresh2)
permutation "I1" "I2b" "I21" Refresh2 Refresh3(Refresh2) "I2c" Refresh3(Refresh2)

0 comments on commit 4bd2dc1

Please sign in to comment.