Fourth reconciliation PR from production/RRFS.v1 + Add PIO switch to WW3 to avoid build errors #2512

tests/bl_date.conf

@@ -1 +1 @@
-export BL_DATE=20241127
+export BL_DATE=20241203

tests/test_changes.list

@@ -1,53 +1,110 @@
-cpld_control_p8_mixedmode intel
-cpld_control_gfsv17 intel
-cpld_control_gfsv17_iau intel
-cpld_restart_gfsv17 intel
-cpld_mpi_gfsv17 intel
-cpld_control_sfs intel
-cpld_debug_gfsv17 intel
-cpld_control_p8 intel
-cpld_control_p8.v2.sfc intel
-cpld_restart_p8 intel
-cpld_control_qr_p8 intel
-cpld_restart_qr_p8 intel
-cpld_2threads_p8 intel
-cpld_decomp_p8 intel
-cpld_mpi_p8 intel
-cpld_control_ciceC_p8 intel
-cpld_control_c192_p8 intel
-cpld_restart_c192_p8 intel
-cpld_bmark_p8 intel
-cpld_restart_bmark_p8 intel
-cpld_s2sa_p8 intel
-cpld_control_noaero_p8 intel
-cpld_control_nowave_noaero_p8 intel
-cpld_debug_p8 intel
-cpld_debug_noaero_p8 intel
-cpld_control_noaero_p8_agrid intel
-cpld_control_c48 intel
-cpld_warmstart_c48 intel
-cpld_restart_c48 intel
-cpld_control_p8_faster intel
-cpld_control_pdlib_p8 intel
-cpld_restart_pdlib_p8 intel
-cpld_mpi_pdlib_p8 intel
-cpld_debug_pdlib_p8 intel
-datm_cdeps_control_cfsr intel
-datm_cdeps_restart_cfsr intel
-datm_cdeps_control_gefs intel
-datm_cdeps_iau_gefs intel
-datm_cdeps_stochy_gefs intel
-datm_cdeps_ciceC_cfsr intel
-datm_cdeps_bulk_cfsr intel
-datm_cdeps_bulk_gefs intel
-datm_cdeps_mx025_cfsr intel
-datm_cdeps_mx025_gefs intel
-datm_cdeps_multiple_files_cfsr intel
-datm_cdeps_3072x1536_cfsr intel
-datm_cdeps_gfs intel
-datm_cdeps_debug_cfsr intel
-datm_cdeps_control_cfsr_faster intel
-atm_ds2s_docn_dice intel
-cpld_control_nowave_noaero_p8 gnu
-cpld_control_pdlib_p8 gnu
-datm_cdeps_control_cfsr gnu
+control_p8_mynn intel
+regional_control intel
+regional_restart intel
+regional_decomp intel
+regional_2threads intel
+regional_noquilt intel
+regional_netcdf_parallel intel
+regional_2dwrtdecomp intel
+regional_wofs intel
+rap_control intel
+regional_spp_sppt_shum_skeb intel
+rap_decomp intel
+rap_2threads intel
+rap_restart intel
+rap_sfcdiff intel
+rap_sfcdiff_decomp intel
+rap_sfcdiff_restart intel
+hrrr_control intel
+hrrr_control_decomp intel
+hrrr_control_2threads intel
+hrrr_control_restart intel
+rrfs_v1beta intel
+rrfs_v1nssl intel
+rrfs_v1nssl_nohailnoccn intel
+regional_control_faster intel
+regional_debug intel
+rap_control_debug intel
+hrrr_control_debug intel
+hrrr_gf_debug intel
+hrrr_c3_debug intel
+rap_unified_drag_suite_debug intel
+rap_diag_debug intel
+rap_cires_ugwp_debug intel
+rap_unified_ugwp_debug intel
+rap_lndp_debug intel
+rap_progcld_thompson_debug intel
+rap_noah_debug intel
+rap_sfcdiff_debug intel
+rap_noah_sfcdiff_cires_ugwp_debug intel
+rrfs_v1beta_debug intel
+rap_clm_lake_debug intel
+rap_flake_debug intel
+gnv1_c96_no_nest_debug intel
+regional_spp_sppt_shum_skeb_dyn32_phy32 intel
+rap_control_dyn32_phy32 intel
+hrrr_control_dyn32_phy32 intel
+rap_2threads_dyn32_phy32 intel
+hrrr_control_2threads_dyn32_phy32 intel
+hrrr_control_decomp_dyn32_phy32 intel
+rap_restart_dyn32_phy32 intel
+hrrr_control_restart_dyn32_phy32 intel
+conus13km_control intel
+conus13km_2threads intel
+conus13km_restart_mismatch intel
+rap_control_dyn64_phy32 intel
+rap_control_debug_dyn32_phy32 intel
+hrrr_control_debug_dyn32_phy32 intel
+conus13km_debug intel
+conus13km_debug_qr intel
+conus13km_debug_2threads intel
+conus13km_radar_tten_debug intel
+rap_control_dyn64_phy32_debug intel
+gnv1_nested intel
+cpld_regional_atm_fbh intel
+rap_control_dyn32_phy32 intelllvm
+rap_control_dyn64_phy32 intelllvm
+rap_control gnu
+rap_decomp gnu
+rap_2threads gnu
+rap_restart gnu
+rap_sfcdiff gnu
+rap_sfcdiff_decomp gnu
+rap_sfcdiff_restart gnu
+hrrr_control gnu
+hrrr_control_noqr gnu
+hrrr_control_2threads gnu
+hrrr_control_decomp gnu
+hrrr_control_restart gnu
+hrrr_control_restart_noqr gnu
+rrfs_v1beta gnu
+regional_debug gnu
+rap_control_debug gnu
+hrrr_control_debug gnu
+hrrr_gf_debug gnu
+hrrr_c3_debug gnu
+rap_diag_debug gnu
+rap_noah_sfcdiff_cires_ugwp_debug gnu
+rap_progcld_thompson_debug gnu
+rrfs_v1beta_debug gnu
+rap_flake_debug gnu
+rap_clm_lake_debug gnu
+gnv1_c96_no_nest_debug gnu
+rap_control_dyn32_phy32 gnu
+hrrr_control_dyn32_phy32 gnu
+rap_2threads_dyn32_phy32 gnu
+hrrr_control_2threads_dyn32_phy32 gnu
+hrrr_control_decomp_dyn32_phy32 gnu
+rap_restart_dyn32_phy32 gnu
+hrrr_control_restart_dyn32_phy32 gnu
+conus13km_control gnu
+conus13km_2threads gnu
+conus13km_restart_mismatch gnu
+rap_control_dyn64_phy32 gnu
+rap_control_debug_dyn32_phy32 gnu
+hrrr_control_debug_dyn32_phy32 gnu
+conus13km_debug gnu
+conus13km_debug_qr gnu
+conus13km_debug_2threads gnu
+conus13km_radar_tten_debug gnu
+rap_control_dyn64_phy32_debug gnu