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Merge pull request #154 from valida-xyz/thealmarty-ldst-align
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Add word alignment checks for `LOAD32` and `STORE32`
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morganthomas authored Apr 20, 2024
2 parents 7a17fe8 + 6fb6498 commit 0a1b859
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Showing 2 changed files with 38 additions and 0 deletions.
34 changes: 34 additions & 0 deletions cpu/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ use core::iter;
use core::marker::Sync;
use core::mem::transmute;
use valida_bus::{MachineWithGeneralBus, MachineWithMemBus, MachineWithProgramBus};
use valida_machine::is_mul_4;
use valida_machine::{
addr_of_word, index_of_byte, instructions, AdviceProvider, Chip, Instruction, InstructionWord,
Interaction, Operands, Word,
Expand Down Expand Up @@ -433,11 +434,27 @@ where
let clk = state.cpu().clock;
let pc = state.cpu().pc;
let fp = state.cpu().fp;

let read_addr_1 = (fp as i32 + ops.c()) as u32;
assert!(
is_mul_4(read_addr_1),
"LOAD32: Read address location is not a multiple of 4!"
);

let read_addr_2 = state
.mem_mut()
.read(clk, read_addr_1, true, pc, opcode, 0, "");
assert!(
is_mul_4(read_addr_2.into()),
"LOAD32: Read address is not a multiple of 4!"
);

let write_addr = (state.cpu().fp as i32 + ops.a()) as u32;
assert!(
is_mul_4(write_addr),
"LOAD32: Write address location is not a multiple of 4!"
);

let cell = state.mem_mut().read(
clk,
read_addr_2.into(),
Expand Down Expand Up @@ -581,12 +598,29 @@ where
fn execute(state: &mut M, ops: Operands<i32>) {
let opcode = <Self as Instruction<M, F>>::OPCODE;
let clk = state.cpu().clock;

let read_addr = (state.cpu().fp as i32 + ops.c()) as u32;
assert!(
is_mul_4(read_addr),
"STORE32: Read address is not a multiple of 4!"
);

let write_addr_loc = (state.cpu().fp as i32 + ops.b()) as u32;
assert!(
is_mul_4(write_addr_loc),
"STORE32: Write address location is not a multiple of 4!"
);

let pc = state.cpu().pc;

let write_addr = state
.mem_mut()
.read(clk, write_addr_loc, true, pc, opcode, 0, "");
assert!(
is_mul_4(write_addr.into()),
"STORE32: Write address is not a multiple of 4!"
);

let cell = state
.mem_mut()
.read(clk, read_addr, true, pc, opcode, 1, "");
Expand Down
4 changes: 4 additions & 0 deletions machine/src/core.rs
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,10 @@ pub fn index_of_byte(addr: u32) -> usize {
pub fn addr_of_word(addr: u32) -> u32 {
(addr & !3) as u32
}

pub fn is_mul_4(addr: u32) -> bool {
addr.rem_euclid(4) == 0
}
//----------------------------------

impl Word<u8> {
Expand Down

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