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Fix read before write bug.
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thealmarty committed Apr 18, 2024
1 parent d35cb75 commit fea2f0c
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Showing 2 changed files with 15 additions and 12 deletions.
25 changes: 14 additions & 11 deletions cpu/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ use core::marker::Sync;
use core::mem::transmute;
use valida_bus::{MachineWithGeneralBus, MachineWithMemBus, MachineWithProgramBus};
use valida_machine::{
index_of_byte, index_to_word, instructions, AdviceProvider, Chip, Instruction, InstructionWord,
index_of_byte, addr_of_word, instructions, AdviceProvider, Chip, Instruction, InstructionWord,
Interaction, Operands, Word,
};
use valida_memory::{MachineWithMemoryChip, Operation as MemoryOperation};
Expand Down Expand Up @@ -476,7 +476,7 @@ where
let read_addr = state
.mem_mut()
.read(clk, read_addr_loc, true, pc, opcode, 0, "");
let read_addr_index = index_to_word(read_addr.into());
let read_addr_index = addr_of_word(read_addr.into());

// The word from the read address.
let cell = state.mem_mut().read(
Expand All @@ -501,7 +501,7 @@ where

let write_addr = (state.cpu().fp as i32 + ops.a()) as u32;
// The address, converted to a multiple of 4.
let write_addr_index = index_to_word(write_addr);
let write_addr_index = addr_of_word(write_addr);

// The Word to write, with one byte overwritten to the read byte
let cell_to_write = Word::zero_extend_byte(cell_byte);
Expand Down Expand Up @@ -532,12 +532,15 @@ where
let read_addr = state
.mem_mut()
.read(clk, read_addr_loc, true, pc, opcode, 0, "");
let read_addr_index = index_to_word(read_addr.into());


let read_addr_index = addr_of_word(read_addr.into());

assert_eq!(0xFFFFFFE8 as u32, addr_of_word(0xFFFFFFE8), "we are testing addr_of_word");

// The word from the read address.
let cell = state.mem_mut().read(
clk,
read_addr.into(), //TODO should be read_addr_index but currently it causes read before write error.
read_addr_index,
true,
pc,
opcode,
Expand All @@ -557,7 +560,7 @@ where

let write_addr = (state.cpu().fp as i32 + ops.a()) as u32;
// The address, converted to a multiple of 4.
let write_addr_index = index_to_word(write_addr);
let write_addr_index = addr_of_word(write_addr);

// The Word to write, with one byte overwritten to the read byte
let cell_to_write = Word::sign_extend_byte(cell_byte);
Expand Down Expand Up @@ -585,7 +588,7 @@ where
let pc = state.cpu().pc;
let write_addr = state
.mem_mut()
.read(clk, write_addr_loc.into(), true, pc, opcode, 0, "");
.read(clk, write_addr_loc, true, pc, opcode, 0, "");
let cell = state
.mem_mut()
.read(clk, read_addr, true, pc, opcode, 1, "");
Expand All @@ -608,7 +611,7 @@ where
let read_addr = (state.cpu().fp as i32 + ops.c()) as u32;

// Make sure we get to the correct and non empty map for the byte.
let read_addr_index = index_to_word(read_addr);
let read_addr_index = addr_of_word(read_addr);
let write_addr_loc = (state.cpu().fp as i32 + ops.b()) as u32;
let pc = state.cpu().pc;
let write_addr = state
Expand All @@ -632,7 +635,7 @@ where
let index_of_write = index_of_byte(write_addr.into());

// The key to the memory map, converted to a multiple of 4.
let write_addr_index = index_to_word(write_addr.into());
let write_addr_index = addr_of_word(write_addr.into());

// The original content of the cell to write to. If the cell is empty, initiate it with a default value.
let cell_write = state.mem_mut().read_or_init(clk, write_addr_index, true);
Expand All @@ -642,7 +645,7 @@ where

state
.mem_mut()
.write(clk, write_addr.into(), cell_to_write, true);
.write(clk, write_addr_index, cell_to_write, true);
state.cpu_mut().pc += 1;
state.cpu_mut().push_op(Operation::StoreU8, opcode, ops);
}
Expand Down
2 changes: 1 addition & 1 deletion machine/src/core.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ pub fn index_of_byte(addr: u32) -> usize {
}

/// Get the address of the memory cells which is not empty (a multiple of 4).
pub fn index_to_word(addr: u32) -> u32 {
pub fn addr_of_word(addr: u32) -> u32 {
(addr & !3) as u32
}
//----------------------------------
Expand Down

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