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imx8mp-var-dart: Add support to SOMs with 1GB DDR
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Addresses in the linker files (*.ld) were remapped to support 1GB DDR.

Signed-off-by: Andre Morishita <[email protected]>
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FrancescoFerraro authored and morishitaandre committed Oct 9, 2024
1 parent dc7f1a7 commit 2ec546e
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Showing 131 changed files with 263 additions and 263 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

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Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x80000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x80000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x80200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
m_interrupts (RX) : ORIGIN = 0x7E000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x7E000400, LENGTH = 0x001FFC00
m_data (RW) : ORIGIN = 0x7E200000, LENGTH = 0x00200000
m_data2 (RW) : ORIGIN = 0x7E400000, LENGTH = 0x00C00000
}

/* Define output sections */
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x08000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x08000400, LENGTH = 0x000FFC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
m_tcml (RW) : ORIGIN = 0x00000020, LENGTH = 0x0001FFE0
}

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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ MEMORY
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_data2 (RW) : ORIGIN = 0x80000000, LENGTH = 0x01000000
m_data2 (RW) : ORIGIN = 0x7E000000, LENGTH = 0x01000000
}

/* Define output sections */
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