Merge branch 'master' into temp_place_ref

libs/librrgraph/src/base/rr_graph_storage.h

@@ -15,8 +15,9 @@
 #include "vtr_memory.h"
 #include "vtr_strong_id_range.h"
 #include "vtr_array_view.h"
-#include<iostream>
+#include <iostream>
 #include <optional>
+#include <cstdint>
 
 /* Main structure describing one routing resource node.  Everything in       *
  * this structure should describe the graph -- information needed only       *

libs/librrgraph/src/base/rr_node_types.h

@@ -7,6 +7,7 @@
 #include <vector>
 #include <array>
 #include <map>
+#include <cstdint>
 #include "vtr_range.h"
 #include "vtr_ndmatrix.h"
 

libs/librrgraph/src/io/gen/README.gen.md

@@ -2,4 +2,4 @@
 `rr_graph_uxsdcxx_interface.h` are generated via uxsdcxx and are checked in to
 avoid requiring python3 and the uxsdcxx depedencies to build VPR.
 
-See `vpr/src/route/gen/SCHEMA_GENERATOR.md` for details.
+See `$VTR_DIR/libs/librrgraph/src/base/SCHEMA_GENERATOR.md` for details.

libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h

@@ -4,9 +4,9 @@
  * https://github.com/duck2/uxsdcxx
  * Modify only if your build process doesn't involve regenerating this file.
  *
- * Cmdline: /home/talaeikh/uxsdcxx/uxsdcxx.py /home/talaeikh/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
- * Input file: /home/talaeikh/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
- * md5sum of input file: 9c14a0ddd3c6bc1e690ca6abf467bae6
+ * Cmdline: uxsdcxx/uxsdcxx.py /home/mohagh18/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
+ * Input file: /home/mohagh18/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
+ * md5sum of input file: 65eddcc840064bbb91d7f4cf0b8bf821
  */
 
 #include <functional>
@@ -247,8 +247,8 @@ constexpr const char *atok_lookup_t_segment_timing[] = {"C_per_meter", "R_per_me
 
 enum class gtok_t_segment {TIMING};
 constexpr const char *gtok_lookup_t_segment[] = {"timing"};
-enum class atok_t_segment {ID, NAME, RES_TYPE};
-constexpr const char *atok_lookup_t_segment[] = {"id", "name", "res_type"};
+enum class atok_t_segment {ID, LENGTH, NAME, RES_TYPE};
+constexpr const char *atok_lookup_t_segment[] = {"id", "length", "name", "res_type"};
 
 enum class gtok_t_segments {SEGMENT};
 constexpr const char *gtok_lookup_t_segments[] = {"segment"};
@@ -792,6 +792,24 @@ inline atok_t_segment lex_attr_t_segment(const char *in, const std::function<voi
 		default: break;
 		}
 		break;
+	case 6:
+		switch(*((triehash_uu32*)&in[0])){
+		case onechar('l', 0, 32) | onechar('e', 8, 32) | onechar('n', 16, 32) | onechar('g', 24, 32):
+			switch(in[4]){
+			case onechar('t', 0, 8):
+				switch(in[5]){
+				case onechar('h', 0, 8):
+					return atok_t_segment::LENGTH;
+				break;
+				default: break;
+				}
+			break;
+			default: break;
+			}
+		break;
+		default: break;
+		}
+		break;
 	case 8:
 		switch(*((triehash_uu64*)&in[0])){
 		case onechar('r', 0, 64) | onechar('e', 8, 64) | onechar('s', 16, 64) | onechar('_', 24, 64) | onechar('t', 32, 64) | onechar('y', 40, 64) | onechar('p', 48, 64) | onechar('e', 56, 64):
@@ -2325,7 +2343,7 @@ inline void load_switch_required_attributes(const pugi::xml_node &root, int * id
 }
 
 inline void load_segment_required_attributes(const pugi::xml_node &root, int * id, const std::function<void(const char *)> * report_error){
-	std::bitset<3> astate = 0;
+	std::bitset<4> astate = 0;
 	for(pugi::xml_attribute attr = root.first_attribute(); attr; attr = attr.next_attribute()){
 		atok_t_segment in = lex_attr_t_segment(attr.name(), report_error);
 		if(astate[(int)in] == 0) astate[(int)in] = 1;
@@ -2334,6 +2352,9 @@ inline void load_segment_required_attributes(const pugi::xml_node &root, int * i
 		case atok_t_segment::ID:
 			*id = load_int(attr.value(), report_error);
 			break;
+		case atok_t_segment::LENGTH:
+			/* Attribute length set after element init */
+			break;
 		case atok_t_segment::NAME:
 			/* Attribute name set after element init */
 			break;
@@ -2343,7 +2364,7 @@ inline void load_segment_required_attributes(const pugi::xml_node &root, int * i
 		default: break; /* Not possible. */
 		}
 	}
-	std::bitset<3> test_astate = astate | std::bitset<3>(0b100);
+	std::bitset<4> test_astate = astate | std::bitset<4>(0b1010);
 	if(!test_astate.all()) attr_error(test_astate, atok_lookup_t_segment, report_error);
 }
 
@@ -2936,6 +2957,9 @@ inline void load_segment(const pugi::xml_node &root, T &out, Context &context, c
 		case atok_t_segment::ID:
 			/* Attribute id is already set */
 			break;
+		case atok_t_segment::LENGTH:
+			out.set_segment_length(load_int(attr.value(), report_error), context);
+			break;
 		case atok_t_segment::NAME:
 			out.set_segment_name(attr.value(), context);
 			break;
@@ -4006,6 +4030,8 @@ inline void write_segments(T &in, std::ostream &os, Context &context){
 			auto child_context = in.get_segments_segment(i, context);
 			os << "<segment";
 			os << " id=\"" << in.get_segment_id(child_context) << "\"";
+			if((bool)in.get_segment_length(child_context))
+				os << " length=\"" << in.get_segment_length(child_context) << "\"";
 			os << " name=\"" << in.get_segment_name(child_context) << "\"";
 			if((bool)in.get_segment_res_type(child_context))
 				os << " res_type=\"" << lookup_segment_res_type[(int)in.get_segment_res_type(child_context)] << "\"";

libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_capnp.h

@@ -4,9 +4,9 @@
  * https://github.com/duck2/uxsdcxx
  * Modify only if your build process doesn't involve regenerating this file.
  *
- * Cmdline: /home/talaeikh/uxsdcxx/uxsdcap.py /home/talaeikh/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
- * Input file: /home/talaeikh/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
- * md5sum of input file: 9c14a0ddd3c6bc1e690ca6abf467bae6
+ * Cmdline: uxsdcxx/uxsdcap.py /home/mohagh18/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
+ * Input file: /home/mohagh18/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
+ * md5sum of input file: 65eddcc840064bbb91d7f4cf0b8bf821
  */
 
 #include <functional>
@@ -601,6 +601,7 @@ inline void load_segment_capnp_type(const ucap::Segment::Reader &root, T &out, C
 	(void)report_error;
 	(void)stack;
 
+	out.set_segment_length(root.getLength(), context);
 	out.set_segment_name(root.getName().cStr(), context);
 	out.set_segment_res_type(conv_enum_segment_res_type(root.getResType(), report_error), context);
 	stack->push_back(std::make_pair("getTiming", 0));
@@ -1101,6 +1102,8 @@ inline void write_segments_capnp_type(T &in, ucap::Segments::Builder &root, Cont
 		auto segments_segment = segments_segments[i];
 		auto child_context = in.get_segments_segment(i, context);
 		segments_segment.setId(in.get_segment_id(child_context));
+		if((bool)in.get_segment_length(child_context))
+			segments_segment.setLength(in.get_segment_length(child_context));
 		segments_segment.setName(in.get_segment_name(child_context));
 		if((bool)in.get_segment_res_type(child_context))
 			segments_segment.setResType(conv_to_enum_segment_res_type(in.get_segment_res_type(child_context)));

libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h

@@ -4,9 +4,9 @@
  * https://github.com/duck2/uxsdcxx
  * Modify only if your build process doesn't involve regenerating this file.
  *
- * Cmdline: /home/talaeikh/uxsdcxx/uxsdcxx.py /home/talaeikh/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
- * Input file: /home/talaeikh/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
- * md5sum of input file: 9c14a0ddd3c6bc1e690ca6abf467bae6
+ * Cmdline: uxsdcxx/uxsdcxx.py /home/mohagh18/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
+ * Input file: /home/mohagh18/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
+ * md5sum of input file: 65eddcc840064bbb91d7f4cf0b8bf821
  */
 
 #include <functional>
@@ -245,11 +245,14 @@ class RrGraphBase {
 	 *     <xs:element minOccurs="0" name="timing" type="segment_timing" />
 	 *   </xs:all>
 	 *   <xs:attribute name="id" type="xs:int" use="required" />
+	 *   <xs:attribute name="length" type="xs:int" />
 	 *   <xs:attribute name="name" type="xs:string" use="required" />
 	 *   <xs:attribute name="res_type" type="segment_res_type" />
 	 * </xs:complexType>
 	*/
 	virtual inline int get_segment_id(typename ContextTypes::SegmentReadContext &ctx) = 0;
+	virtual inline int get_segment_length(typename ContextTypes::SegmentReadContext &ctx) = 0;
+	virtual inline void set_segment_length(int length, typename ContextTypes::SegmentWriteContext &ctx) = 0;
 	virtual inline const char * get_segment_name(typename ContextTypes::SegmentReadContext &ctx) = 0;
 	virtual inline void set_segment_name(const char * name, typename ContextTypes::SegmentWriteContext &ctx) = 0;
 	virtual inline enum_segment_res_type get_segment_res_type(typename ContextTypes::SegmentReadContext &ctx) = 0;

libs/librrgraph/src/io/rr_graph.xsd

@@ -155,6 +155,7 @@
       <xs:element name="timing" type="segment_timing" minOccurs="0"/>
     </xs:all>
     <xs:attribute name="id" type="xs:int" use="required"/>
+    <xs:attribute name="length" type="xs:int"/>
     <xs:attribute name="name" type="xs:string" use="required"/>
     <xs:attribute name="res_type" type="segment_res_type"/>
   </xs:complexType>

libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h

@@ -1347,13 +1347,23 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
     inline const char* get_segment_name(const t_segment_inf*& segment) final {
         return segment->name.c_str();
     }
+    inline int get_segment_length(const t_segment_inf*& segment) final {
+        return segment->length;
+    }
     inline void set_segment_name(const char* name, const t_segment_inf*& segment) final {
         if (segment->name != name) {
             report_error(
                 "Architecture file does not match RR graph's segment name: arch uses %s, RR graph uses %s",
                 segment->name.c_str(), name);
         }
     }
+    inline void set_segment_length(int length, const t_segment_inf*& segment) final {
+        if (segment->length != length) {
+            report_error(
+                "Architecture file does not match RR graph's length: arch uses %d, RR graph uses %d",
+                segment->length, length);
+        }
+    }
     inline uxsd::enum_segment_res_type get_segment_res_type(const t_segment_inf*& segment) final {
         return to_uxsd_segment_res_type(segment->res_type);
     }

libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp

@@ -2,11 +2,11 @@
 # https://github.com/duck2/uxsdcxx
 # Modify only if your build process doesn't involve regenerating this file.
 #
-# Cmdline: /home/talaeikh/uxsdcxx/uxsdcap.py /home/talaeikh/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
-# Input file: /home/talaeikh/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
-# md5sum of input file: 9c14a0ddd3c6bc1e690ca6abf467bae6
+# Cmdline: uxsdcxx/uxsdcap.py /home/mohagh18/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
+# Input file: /home/mohagh18/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
+# md5sum of input file: 65eddcc840064bbb91d7f4cf0b8bf821
 
-@0xa136dd28cdc8783b;
+@0xe787bf7696810419;
 using Cxx = import "/capnp/c++.capnp";
 $Cxx.namespace("ucap");
 
@@ -129,9 +129,10 @@ struct SegmentTiming {
 
 struct Segment {
 	id @0 :Int32;
-	name @1 :Text;
-	resType @2 :SegmentResType;
-	timing @3 :SegmentTiming;
+	length @1 :Int32;
+	name @2 :Text;
+	resType @3 :SegmentResType;
+	timing @4 :SegmentTiming;
 }
 
 struct Segments {

libs/libvtrutil/src/vtr_ragged_matrix.h

@@ -238,11 +238,11 @@ class FlatRaggedMatrix {
             return !(*this == other);
         }
 
-        int operator-(const RowLengthIterator& other) {
+        difference_type operator-(const RowLengthIterator& other) {
             return irow_ - other.irow_;
         }
 
-        size_t operator*() {
+        value_type operator*() {
             //Call the callback to get the row length
             return callback_(Index0(irow_));
         }

libs/libvtrutil/src/vtr_string_interning.h

@@ -48,6 +48,7 @@
 #include <unordered_map>
 #include <stdexcept>
 #include <climits>
+#include <cstdint>
 #include <algorithm>
 #include <array>
 

requirements.txt

@@ -1,11 +1,13 @@
 prettytable
 lxml
 psutil
-
+pandas
+numpy
+scipy
 # Python linter and formatter
 click==8.0.2 # Our version of black needs an older version of click (https://stackoverflow.com/questions/71673404/importerror-cannot-import-name-unicodefun-from-click)
 black==21.4b0
 pylint==2.7.4
 
 # Surelog
-orderedmultidict
+orderedmultidict