optimize computation in librrgraph utils

In one hot loop, swap three expensive FDIVs for a single FDIV and three FMULs.
verilog-to-routing · Sep 5, 2024 · a25b7ec · a25b7ec
1 parent c7b9ce0
commit a25b7ec
Showing 1 changed file with 4 additions and 3 deletions.
diff --git a/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp b/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp
@@ -678,9 +678,10 @@ static void calculate_average_switch(const RRGraphView& rr_graph, int inode, dou
     }
 
     if (num_switches > 0) {
-        avg_switch_R /= num_switches;
-        avg_switch_T /= num_switches;
-        avg_switch_Cinternal /= num_switches;
+        double inv_num_switches = 1.0 / num_switches;
+        avg_switch_R *= inv_num_switches;
+        avg_switch_T *= inv_num_switches;
+        avg_switch_Cinternal *= inv_num_switches;
     }
 
     VTR_ASSERT(std::isfinite(avg_switch_R));