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NoC SAT Routing #2564
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NoC SAT Routing #2564
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This means that constraints are probably set correctly.
…er of congested links
…ighting factors in SAT routing
…ommand line options
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VPR FPGA Placement & Routing Tool
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May 27, 2024
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@soheilshahrouz : it's worth writing up how you handle the dependence on google OR tools in this PR.
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vaughnbetz
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Do we have a test of the SAT NoC router? Should add a test that builds it and runs it on some configuration.
Otherwise, set the number of parallel SAT solver workers to -j
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build
Build system
external_libs
lang-cpp
C/C++ code
lang-make
CMake/Make code
libvtrutil
VPR
VPR FPGA Placement & Routing Tool
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This PR formulated NoC routing as a SAT problem and invoked cp-sat solver in or-tools to find a deadlock-free solution with the minimum congestion.
Description
Turn model routing algorithms used during annealing generate minimal routes between NoC routers. Congestion may not be resolved with minimal routing. If any NoC link is still congested at the end of the annealing process, we use a SAT solver to find traffic flow routes that minimize congestion while trying to meet latency constraints and prevent the aggregate bandwidth from growing too much.
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Checklist: