Merge branch 'develop' of https://github.com/vortexgpgpu/vortex into …

…develop
vortexgpgpu · Sep 5, 2024 · 282930a · 282930a
2 parents bfd8870 + cf9172b
commit 282930a
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Showing 7 changed files with 14 additions and 14 deletions.
diff --git a/hw/rtl/cache/VX_cache_bank.sv b/hw/rtl/cache/VX_cache_bank.sv
@@ -394,7 +394,7 @@ module VX_cache_bank #(
     `UNUSED_VAR (do_write_miss_st1)
 
     // ensure mshr replay always get a hit
-    `RUNTIME_ASSERT (~(valid_st1 && is_replay_st1) || is_hit_st1, ("missed mshr replay"));
+    `RUNTIME_ASSERT (~(valid_st1 && is_replay_st1) || is_hit_st1, ("%t: missed mshr replay", $time));
 
     // both tag and data stores use BRAM with no read-during-write protection.
     // we ned to stall the pipeline to prevent read-after-write hazards.
@@ -599,7 +599,7 @@ module VX_cache_bank #(
         if (DIRTY_BYTES) begin
             // ensure dirty bytes match the tag info
             wire has_dirty_bytes = (| dirty_byteen_st1);
-            `RUNTIME_ASSERT (~do_fill_or_flush_st1 || (evict_dirty_st1 == has_dirty_bytes), ("missmatch dirty bytes: dirty_line=%b, dirty_bytes=%b, addr=0x%0h", evict_dirty_st1, has_dirty_bytes, `CS_LINE_TO_FULL_ADDR(addr_st1, BANK_ID)));
+            `RUNTIME_ASSERT (~do_fill_or_flush_st1 || (evict_dirty_st1 == has_dirty_bytes), ("%t: missmatch dirty bytes: dirty_line=%b, dirty_bytes=%b, addr=0x%0h", $time, evict_dirty_st1, has_dirty_bytes, `CS_LINE_TO_FULL_ADDR(addr_st1, BANK_ID)));
         end
         assign mreq_queue_push = (((do_read_miss_st1 || do_write_miss_st1) && ~mshr_pending_st1)
                                || do_writeback_st1)

diff --git a/hw/rtl/core/VX_lsu_slice.sv b/hw/rtl/core/VX_lsu_slice.sv
@@ -188,8 +188,8 @@ module VX_lsu_slice import VX_gpu_pkg::*; #(
     for (genvar i = 0; i < NUM_LANES; ++i) begin
         wire lsu_req_fire = execute_if.valid && execute_if.ready;
         `RUNTIME_ASSERT((~lsu_req_fire || ~execute_if.data.tmask[i] || req_is_fence || (full_addr[i] % (1 << `INST_LSU_WSIZE(execute_if.data.op_type))) == 0),
-            ("misaligned memory access, wid=%0d, PC=0x%0h, addr=0x%0h, wsize=%0d! (#%0d)",
-                execute_if.data.wid, {execute_if.data.PC, 1'b0}, full_addr[i], `INST_LSU_WSIZE(execute_if.data.op_type), execute_if.data.uuid));
+            ("%t: misaligned memory access, wid=%0d, PC=0x%0h, addr=0x%0h, wsize=%0d! (#%0d)",
+                $time, execute_if.data.wid, {execute_if.data.PC, 1'b0}, full_addr[i], `INST_LSU_WSIZE(execute_if.data.op_type), execute_if.data.uuid));
     end
 
     // store data formatting
@@ -271,8 +271,8 @@ module VX_lsu_slice import VX_gpu_pkg::*; #(
 
         assign mem_rsp_sop_pkt = pkt_sop[pkt_raddr];
         assign mem_rsp_eop_pkt = mem_rsp_eop_fire && pkt_eop[pkt_raddr] && (pkt_ctr[pkt_raddr] == 1);
-        `RUNTIME_ASSERT(~(mem_req_rd_fire && full), ("allocator full!"))
-        `RUNTIME_ASSERT(~mem_req_rd_sop_fire || 0 == pkt_ctr[pkt_waddr], ("Oops!"))
+        `RUNTIME_ASSERT(~(mem_req_rd_fire && full), ("%t: allocator full!", $time))
+        `RUNTIME_ASSERT(~mem_req_rd_sop_fire || 0 == pkt_ctr[pkt_waddr], ("%t: oops! broken sop request!", $time))
         `UNUSED_VAR (mem_rsp_sop)
     end else begin
         assign pkt_waddr = 0;

diff --git a/hw/rtl/libs/VX_dp_ram.sv b/hw/rtl/libs/VX_dp_ram.sv
@@ -59,7 +59,7 @@ module VX_dp_ram #(
     `UNUSED_VAR (read)
 
     if (WRENW > 1) begin
-        `RUNTIME_ASSERT(~write || (| wren), ("invalid write enable mask"));
+        `RUNTIME_ASSERT(~write || (| wren), ("%t: invalid write enable mask", $time));
     end
 
     if (OUT_REG && !READ_ENABLE) begin
@@ -341,7 +341,7 @@ module VX_dp_ram #(
 
             assign rdata_w = (prev_write && (prev_waddr == raddr)) ? prev_data : ram[raddr];
             if (RW_ASSERT) begin
-                `RUNTIME_ASSERT(~read || (rdata_w == ram[raddr]), ("read after write hazard"));
+                `RUNTIME_ASSERT(~read || (rdata_w == ram[raddr]), ("%t: read after write hazard", $time));
             end
         end
     `endif

diff --git a/hw/rtl/libs/VX_fifo_queue.sv b/hw/rtl/libs/VX_fifo_queue.sv
@@ -162,8 +162,8 @@ module VX_fifo_queue #(
         end
     end
 
-    `RUNTIME_ASSERT(~(push && ~pop) || ~full, ("runtime error: incrementing full queue"));
-    `RUNTIME_ASSERT(~(pop && ~push) || ~empty, ("runtime error: decrementing empty queue"));
+    `RUNTIME_ASSERT(~(push && ~pop) || ~full, ("%t: runtime error: incrementing full queue", $time));
+    `RUNTIME_ASSERT(~(pop && ~push) || ~empty, ("%t: runtime error: decrementing empty queue", $time));
 
 endmodule
 `TRACING_ON
diff --git a/hw/rtl/libs/VX_generic_arbiter.sv b/hw/rtl/libs/VX_generic_arbiter.sv
@@ -90,7 +90,7 @@ module VX_generic_arbiter #(
 
     end
 
-    `RUNTIME_ASSERT ((~(| requests) || (grant_valid && (requests[grant_index] != 0) && (grant_onehot == (NUM_REQS'(1) << grant_index)))), ("invalid arbiter grant!"))
+    `RUNTIME_ASSERT ((~(| requests) || (grant_valid && (requests[grant_index] != 0) && (grant_onehot == (NUM_REQS'(1) << grant_index)))), ("%t: invalid arbiter grant!", $time))
 
 endmodule
 `TRACING_ON
diff --git a/hw/rtl/libs/VX_mem_coalescer.sv b/hw/rtl/libs/VX_mem_coalescer.sv
@@ -75,8 +75,8 @@ module VX_mem_coalescer #(
     `UNUSED_SPARAM (INSTANCE_ID)
     `STATIC_ASSERT (`IS_DIVISBLE(NUM_REQS * DATA_IN_WIDTH, DATA_OUT_WIDTH), ("invalid parameter"))
     `STATIC_ASSERT ((NUM_REQS * DATA_IN_WIDTH >= DATA_OUT_WIDTH), ("invalid parameter"))
-    `RUNTIME_ASSERT ((~in_req_valid || in_req_mask != 0), ("invalid request mask"));
-    `RUNTIME_ASSERT ((~out_rsp_valid || out_rsp_mask != 0), ("invalid request mask"));
+    `RUNTIME_ASSERT ((~in_req_valid || in_req_mask != 0), ("%t: invalid request mask", $time));
+    `RUNTIME_ASSERT ((~out_rsp_valid || out_rsp_mask != 0), ("%t: invalid request mask", $time));
 
     localparam TAG_ID_WIDTH = TAG_WIDTH - UUID_WIDTH;
     //                           tag          + mask     + offest

diff --git a/hw/rtl/libs/VX_mem_scheduler.sv b/hw/rtl/libs/VX_mem_scheduler.sv
@@ -97,7 +97,7 @@ module VX_mem_scheduler #(
     `STATIC_ASSERT (`IS_DIVISBLE(CORE_REQS * WORD_SIZE, LINE_SIZE), ("invalid parameter"))
     `STATIC_ASSERT ((TAG_WIDTH >= UUID_WIDTH), ("invalid parameter"))
     `STATIC_ASSERT ((0 == RSP_PARTIAL) || (1 == RSP_PARTIAL), ("invalid parameter"))
-    `RUNTIME_ASSERT((~core_req_valid || core_req_mask != 0), ("invalid request mask"));
+    `RUNTIME_ASSERT((~core_req_valid || core_req_mask != 0), ("%t: invalid request mask", $time));
 
     wire                            ibuf_push;
     wire                            ibuf_pop;