RISC-V 64: Add assembly code for SHA-256 #7758
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SparkiDev
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@SparkiDev I will run this on actual hardware and compare performance for SHA2-256. |
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HiFive Unleashed at 1.4GHz: SHA-256: 18.326 MiB/s -> 20.399 MiB/s PR 7758 (with RISCV-ASM): Master (with RISCV-ASM): |
dgarske
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Jul 22, 2024
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Please generate benchmarks with assembly code again. Thanks, |
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Using bbd74f7: Only slightly faster: |
dgarske
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Jul 25, 2024
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Let me know if there is any improvement in performance with the new assembly code. |
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Appears to be 4.6% faster. |
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Retest this please |
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Move common defines out of AES file to header file.
SparkiDev
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Last time. |
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Run again at commit f1e01e4 (no difference). Is it possible this HiFive Unleashed doesn't support the assembly instructions you are trying to use? I have another RISC-V board Microchip PolarFire® SoC Discovery Kit (https://www.microchip.com/en-us/development-tool/MPFS-DISCO-KIT?_ga=2.239966534.437271057.1722361866-327000224.1722361866), but its not setup with Linux yet. Would you like me to attempt to run on that one? |
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That's enough. Merge once you are happy with the code. Thanks, |
dgarske
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Jul 30, 2024
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Description
Move common defines out of AES file to header file.
Testing
Regression tested RISC-V 64 ASM.
Checklist