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* WIP * Break/continue tests * Fix loop continue/break gate block ordering
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,36 +1,29 @@ | ||
| void main() { | ||
| // CHECK: %cst0_si32 = spirv.Constant 0 : si32 | ||
| // CHECK-NEXT: %0 = spirv.Variable : !spirv.ptr<si32, Function> | ||
| // CHECK-NEXT: spirv.Store "Function" %0, %cst0_si32 : si32 | ||
| // CHECK-NEXT: spirv.mlir.loop { | ||
| // CHECK-NEXT: spirv.Branch ^bb1 | ||
| // CHECK-NEXT: ^bb1: // 2 preds: ^bb0, ^bb2 | ||
| // CHECK: %2 = spirv.Variable : !spirv.ptr<si32, Function> | ||
| // CHECK: spirv.mlir.loop { | ||
| // CHECK-NEXT: spirv.Branch ^bb1 | ||
| // CHECK-NEXT: ^bb1: // 2 preds: ^bb0, ^bb3 | ||
| // CHECK-NEXT: %cst10_si32 = spirv.Constant 10 : si32 | ||
| // CHECK-NEXT: %2 = spirv.Load "Function" %0 : si32 | ||
| // CHECK-NEXT: %3 = spirv.SLessThan %2, %cst10_si32 : si32 | ||
| // CHECK-NEXT: spirv.BranchConditional %3, ^bb2, ^bb3 | ||
| // CHECK-NEXT: ^bb2: // pred: ^bb1 | ||
| // CHECK-NEXT: %3 = spirv.Load "Function" %2 : si32 | ||
| // CHECK-NEXT: %4 = spirv.SLessThan %3, %cst10_si32 : si32 | ||
| // CHECK-NEXT: spirv.BranchConditional %4, ^bb2, ^bb4 | ||
| // CHECK-NEXT:^bb2: // pred: ^bb1 | ||
| // CHECK-NEXT: %cst1_si32 = spirv.Constant 1 : si32 | ||
| // CHECK-NEXT: %4 = spirv.Load "Function" %0 : si32 | ||
| // CHECK-NEXT: %5 = spirv.IAdd %4, %cst1_si32 : si32 | ||
| // CHECK-NEXT: %6 = spirv.Variable : !spirv.ptr<si32, Function> | ||
| // CHECK-NEXT: spirv.Store "Function" %6, %5 : si32 | ||
| // CHECK-NEXT: %7 = spirv.Load "Function" %0 : si32 | ||
| // CHECK-NEXT: %cst1_si32_1 = spirv.Constant 1 : si32 | ||
| // CHECK-NEXT: %8 = spirv.IAdd %7, %cst1_si32_1 : si32 | ||
| // CHECK-NEXT: spirv.Store "Function" %0, %8 : si32 | ||
| // CHECK-NEXT: %5 = spirv.Load "Function" %2 : si32 | ||
| // CHECK-NEXT: %6 = spirv.IAdd %5, %cst1_si32 : si32 | ||
| // CHECK-NEXT: %7 = spirv.Variable : !spirv.ptr<si32, Function> | ||
| // CHECK-NEXT: spirv.Store "Function" %7, %6 : si32 | ||
| // CHECK-NEXT: spirv.Branch ^bb3 | ||
| // CHECK-NEXT:^bb3: // pred: ^bb2 | ||
| // CHECK-NEXT: %8 = spirv.Load "Function" %2 : si32 | ||
| // CHECK-NEXT: %cst1_si32_0 = spirv.Constant 1 : si32 | ||
| // CHECK-NEXT: %9 = spirv.IAdd %8, %cst1_si32_0 : si32 | ||
| // CHECK-NEXT: spirv.Store "Function" %2, %9 : si32 | ||
| // CHECK-NEXT: spirv.Branch ^bb1 | ||
| // CHECK-NEXT: ^bb3: // pred: ^bb1 | ||
| // CHECK-NEXT:^bb4: // pred: ^bb1 | ||
| // CHECK-NEXT: spirv.mlir.merge | ||
| // CHECK-NEXT: } | ||
| // CHECK-NEXT:} | ||
| for (int i = 0; i < 10; ++i) { | ||
| int a = i + 1; | ||
| } | ||
|
|
||
| // TODO: file check embedded loops | ||
| for (int i = 0; i < 10; ++i) { | ||
| for (int j = 0; j < 20; ++j) { | ||
| int a = i + j; | ||
| } | ||
| } | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,38 @@ | ||
| void main() { | ||
| // Hidden break/continue control vars | ||
|
|
||
| // CHECK: %0 = spirv.Variable : !spirv.ptr<i1, Function> | ||
| // CHECK-NEXT: %1 = spirv.Variable : !spirv.ptr<i1, Function> | ||
| while (true) { | ||
| // CHECK: %cst1_si32 = spirv.Constant 1 : si32 | ||
| // CHECK-NEXT: %2 = spirv.Variable : !spirv.ptr<si32, Function> | ||
| // CHECK-NEXT: spirv.Store "Function" %2, %cst1_si32 : si32 | ||
| int someVarBefore = 1; | ||
|
|
||
| // CHECK: ^bb1: // pred: ^bb0 | ||
| // CHECK-NEXT: %true_2 = spirv.Constant true | ||
| // CHECK-NEXT: spirv.Store "Function" %0, %true_2 : i1 | ||
| if (true) { | ||
| break; | ||
| } | ||
|
|
||
| // CHECK: spirv.mlir.merge | ||
| // CHECK-NEXT: } | ||
| // CHECK-NEXT: %3 = spirv.Load "Function" %0 : i1 | ||
| // CHECK-NEXT: spirv.BranchConditional %3, ^bb5, ^bb3 | ||
|
|
||
| // CHECK: ^bb3: // pred: ^bb2 | ||
| // CHECK-NEXT: %false = spirv.Constant false | ||
|
|
||
| // Reset break control var | ||
|
|
||
| // CHECK-NEXT: spirv.Store "Function" %0, %false : i1 | ||
| // CHECK-NEXT: %cst1_si32_1 = spirv.Constant 1 : si32 | ||
| // CHECK-NEXT: %4 = spirv.Variable : !spirv.ptr<si32, Function> | ||
| int someVarAfter = 1; | ||
| } | ||
|
|
||
| // CHECK: ^bb5: // 2 preds: ^bb1, ^bb2 | ||
| // CHECK-NEXT: spirv.mlir.merge | ||
| // CHECK-NEXT: } | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,44 @@ | ||
| void main() { | ||
| // Hidden break/continue control vars | ||
|
|
||
| // CHECK: %0 = spirv.Variable : !spirv.ptr<i1, Function> | ||
| // CHECK-NEXT: %1 = spirv.Variable : !spirv.ptr<i1, Function> | ||
| while (true) { | ||
| // CHECK: %cst1_si32 = spirv.Constant 1 : si32 | ||
| // CHECK-NEXT: %2 = spirv.Variable : !spirv.ptr<si32, Function> | ||
| // CHECK-NEXT: spirv.Store "Function" %2, %cst1_si32 : si32 | ||
| int someVarBefore = 1; | ||
|
|
||
| // CHECK: ^bb1: // pred: ^bb0 | ||
| // CHECK-NEXT: %true_3 = spirv.Constant true | ||
| // CHECK-NEXT: spirv.Store "Function" %1, %true_3 : i1 | ||
| if (true) { | ||
| continue; | ||
| // CHECK: ^bb2: // pred: ^bb0 | ||
| // CHECK-NEXT: %true_4 = spirv.Constant true | ||
| // CHECK-NEXT: spirv.Store "Function" %0, %true_4 : i1 | ||
| } else { | ||
| break; | ||
| } | ||
|
|
||
| // CHECK: spirv.mlir.merge | ||
| // CHECK-NEXT: } | ||
| // CHECK-NEXT: %3 = spirv.Load "Function" %1 : i1 | ||
| // CHECK-NEXT: spirv.BranchConditional %3, ^bb5, ^bb3 | ||
| // CHECK-NEXT: ^bb3: // pred: ^bb2 | ||
| // CHECK-NEXT: %4 = spirv.Load "Function" %0 : i1 | ||
| // CHECK-NEXT: spirv.BranchConditional %4, ^bb6, ^bb4 | ||
|
|
||
| // Reset continue/break control vars | ||
| // CHECK: ^bb4: // pred: ^bb3 | ||
| // CHECK-NEXT: %false = spirv.Constant false | ||
| // CHECK-NEXT: spirv.Store "Function" %0, %false : i1 | ||
| // CHECK-NEXT: %false_1 = spirv.Constant false | ||
| // CHECK-NEXT: spirv.Store "Function" %1, %false_1 : i1 | ||
| int someVarAfter = 1; | ||
| } | ||
|
|
||
| // CHECK: ^bb6: // 2 preds: ^bb1, ^bb3 | ||
| // CHECK-NEXT: spirv.mlir.merge | ||
| // CHECK-NEXT: } | ||
| } |
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