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NABU Code Cleanup
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wwarthen committed May 23, 2024
1 parent a34afaa commit 1cb5f0b
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Showing 7 changed files with 100 additions and 147 deletions.
12 changes: 5 additions & 7 deletions Source/HBIOS/hbios.asm
Original file line number Diff line number Diff line change
Expand Up @@ -1167,13 +1167,6 @@ HBX_RETI:
PUSH BC ; SAVE BC
PUSH DE ; SAVE DE
PUSH IY ; SAVE IY
;
#IF (PLATFORM == PLT_NABU)
PUSH HL
LD HL,($FFEA) ; TICCNT COPIED TO...
LD ($000B),HL ; ...LOW MEMORY FOR CP/M
POP HL
#ENDIF
;
LD A,BID_BIOS ; HBIOS BANK
CALL HBX_BNKSEL_INT ; SELECT IT
Expand Down Expand Up @@ -3019,6 +3012,11 @@ HB_Z280BUS1:
LDCTL HL,(C)
CALL PRTHEXWORDHL
CALL PC_SPACE
PRTS("ISR=$")
LD C,Z280_ISR ; INTERRUPT STATUS REGISTER
LDCTL HL,(C)
CALL PRTHEXWORDHL
CALL PC_SPACE
PRTS("BTCR=$")
LD C,Z280_BTCR ; BUS TIMING AND CONTROL REGISTER
LDCTL HL,(C)
Expand Down
116 changes: 41 additions & 75 deletions Source/HBIOS/nabu.asm
Original file line number Diff line number Diff line change
@@ -1,15 +1,12 @@
;
;==================================================================================================
; NABU INTERRUPT INTERCEPTOR
; NABU HARDWARE DRIVER
;==================================================================================================
;
NABU_INT1CLR .EQU $68
NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B
;
; NABU INTERRUPT ENABLE PORT AND STATUS PORTS ARE MANAGED BY THE
; PSG IO PORTS.
;
; INTERRUPT ENABLE (OUTPUT) - PSG PORT A
; NABU CONTROL PORT - INTERRUPT ENABLE (OUTPUT) - PSG PORT A
;
; D7 - HCCA Receive
; D6 - HCCA Send
Expand All @@ -20,7 +17,13 @@ NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B
; D1 - Option Card 2 (J11)
; DO - Option Card 3 (J12)
;
; STATUS BYTE (INPUT) - PSG PORT B
; THE CONTROL PORT IS WRITE ONLY AND THE BITS NEED TO BE MANAGED IN
; MULTIPLE DRIVERS. BELOW, WE ALLOCATE NBAU_CTLVAL AS A SHADOW
; REGISTER FOR THE CONTROL PORT. IT IS INITIALIZED TO ZERO HERE
; (ALL INTS DISABLED). THE INDIVIDUAL BITS ARE SET AS APPROPIATE IN
; THE DRIVERS THAT WANT THE INTERRUPTS ENABLED (NABUKB, TMS).
;
; NABU STATUS PORT - STATUS BYTE (INPUT) - PSG PORT B
;
; D7 - N.C.
; D6 - Overrun Error (HCCA UART)
Expand All @@ -33,91 +36,54 @@ NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B
;
; PORTS TO MANAGE PSG
;
NABU_RSEL .EQU $41 ; SELECT PSG REGISTER
NABU_RDAT .EQU $40 ; WRITE TO SELECTED REGISTER
NABU_RIN .EQU $40 ; READ FROM SELECTED REGISTER
NABU_BASE .EQU $40 ; BASE PORT FOR NABU PSG
NABU_RSEL .EQU NABU_BASE + 1 ; SELECT PSG REGISTER
NABU_RDAT .EQU NABU_BASE + 0 ; WRITE TO SELECTED REGISTER
NABU_RIN .EQU NABU_BASE + 0 ; READ FROM SELECTED REGISTER
;
DEVECHO "NABU: IO="
DEVECHO NABU_INT1CLR
DEVECHO NABU_BASE
DEVECHO "\n"
;
;
; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION
;
NABU_PREINIT:
; INITIALIZE THE NABU PSG I/O PORTS
; PORT A IN WRITE MODE AND SET ALL BITS TO ZERO
; PORT B IN READ MODE
;
CALL NABU_SETPSG
;
;#IF (INTMODE == 1)
; ; ADD TO INTERRUPT CHAIN
; LD HL,NABU_STAT
; CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
;#ENDIF
; RESET SHADOW REGISTER IN CASE WE ARE DOING AN HBIOS
; RESTART IN PLACE
XOR A ; ALL INTERRUPTS DISABLED
LD (NABU_CTLVAL),A ; SAVE IT
;
;#IF (INTMODE == 2)
; LD HL,NABU_STAT
; LD (IVT(INT_NABUKB)),HL ; IVT INDEX
;#ENDIF
; RET
;
NABU_INIT:
CALL NEWLINE ; FORMATTING
PRTS("NABU: INT1$")
; XOR A
; OUT (NABU_INT1CLR),A
RET ; DONE
; INITIALIZE THE NABU PSG I/O PORTS
; PORT A (CONTROL PORT) IN WRITE MODE
; PORT B (STATUS PORT) IN READ MODE
; INITIALIZE THE CONTROL REGISTER
;
NABU_SETPSG:
; SET I/O PORT MODES
LD A,7 ; PSG R7 (ENABLE REG)
OUT (NABU_RSEL),A ; SELECT IT
LD A,%01111111 ; PORT B INPUT, PORT A OUPUT
LD A,%01111111 ; PORT B INPUT, PORT A OUPUT, AUDIO CHANNELS DISABLED
OUT (NABU_RDAT),A ; SET IT
;
; SET PORT A TO VALUE 0
; INITIALIZE PORT A VALUE
LD A,14 ; PSG R14 (PORT A DATA)
OUT (NABU_RSEL),A ; SELECT IT
#IF (INTMODE > 0)
#IF (TMSTIMENABLE == TRUE)
LD A,%00110000 ; ENABLE NABU KB & VDP INTS
#ELSE
LD A,%00100000 ; ENABLE NABU KB INTS
#ENDIF
#ELSE
XOR A
#ENDIF
OUT (NABU_RDAT),A ; SET IT
LD A,(NABU_CTLVAL) ; GET CTL VALUE SHADOW REG
OUT (NABU_RDAT),A ; WRITE TO HARDWARE
;
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
; POST CONSOLE INITIALIZATION
;
NABU_INIT:
CALL NEWLINE ; FORMATTING
PRTS("NABU: IO=$")
LD A,NABU_BASE
CALL PRTHEXBYTE
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
LD A,15
OUT (NABU_RSEL),A
IN A,(NABU_RIN)
RET
;
; INTERRUPT ENTRY POINT
;
NABU_STAT:
; CALL NABU_SETPSG
; XOR A
; OUT (NABU_INT1CLR),A ; CLEAR THE INTERRUPT
LD HL,(NABU_TICCNT) ; INCREMENT NABU TICK COUNTER
INC HL ; ... IN HBIOS PROXY
LD (NABU_TICCNT),HL
; LD A,(NABU_HBTICK) ; INCREMENT INTERNAL TICK CTR
; INC A
; LD (NABU_HBTICK),A
; CP $0A ; CALL HB_TICK EVERY 10 INTERRUPTS (50HZ)
; RET NZ ; NOT TIME THEN JUST RETURN
CALL HB_TICK ; DO NORMAL HBIOS TICK
XOR A
; LD (NABU_HBTICK),A ; RESET HBTICK COUNTER
INC A ; INTERRUPT HANDLED
RET
;
NABU_HBTICK:
.DB 0 ; INTERNAL TICK CTR
; DATA STORAGE
;
NABU_CTLVAL .DB 0 ; SHADOW VAL FOR NABU CONTROL REGISTER
58 changes: 20 additions & 38 deletions Source/HBIOS/nabukb.asm
Original file line number Diff line number Diff line change
Expand Up @@ -21,28 +21,6 @@
; WILL TRANSLATE SPECIAL KEYS ($E0-$FF) TO ROMWBW EQUIVALENTS. ALL
; OTHER KEYS WILL BE PASSED THROUGH AS IS.
;
; KBPORT EQU $90
;
; POLL FOR INPUT
; KBLOOP:
; IN A,(KBPORT+1)
; BIT 1,A
; JR Z,KBLOOP
; IN A,(KBPORT)
;
; INIT:
; XOR A
; CALL SUB12
; CALL SUB12
; CALL SUB12
; CALL SUB12
; CALL SUB12
; LD A,40H
; CALL SUB12
; LD A,4EH
; CALL SUB12
; LD A,04H
; CALL SUB12
;
NABUKB_IODAT .EQU $90 ; KEYBOARD DATA (READ)
NABUKB_IOSTAT .EQU $91 ; STATUS (READ), CMD (WRITE)
Expand All @@ -51,22 +29,6 @@ NABUKB_IOSTAT .EQU $91 ; STATUS (READ), CMD (WRITE)
DEVECHO NABUKB_IODAT
DEVECHO "\n"
;
; SETUP INTERRUPT HANDLING, IF ENABLED
;
NABUKB_PREINIT:
#IF (INTMODE == 1)
; ADD TO INTERRUPT CHAIN
LD HL,NABUKB_INT
CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
#ENDIF
;
#IF (INTMODE == 2)
; INSTALL VECTOR
LD HL,NABUKB_INT
LD (IVT(INT_NABUKB)),HL ; IVT INDEX
#ENDIF
RET
;
; INITIALZIZE THE KEYBOARD CONTROLLER.
;
NABUKB_INIT:
Expand All @@ -87,6 +49,26 @@ NABUKB_INIT:
CALL NABUKB_PUT
LD A,$04 ; ENABLE RECV
CALL NABUKB_PUT
;
#IF (INTMODE == 1)
; ADD TO INTERRUPT CHAIN
LD HL,NABUKB_INT
CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
#ENDIF
;
#IF (INTMODE == 2)
; INSTALL VECTOR
LD HL,NABUKB_INT
LD (IVT(INT_NABUKB)),HL ; IVT INDEX
#ENDIF
;
; ENABLE KEYBOARD INTERRUPTS ON NABU INTERRUPT CONTROLLER
LD A,14 ; PSG R14 (PORT A DATA)
OUT (NABU_RSEL),A ; SELECT IT
LD A,(NABU_CTLVAL) ; GET NABU CTL PORT SHADOW REG
SET 5,A ; ENABLE VDP INTERRUPTS
LD (NABU_CTLVAL),A ; UPDATE SHADOW REG
OUT (NABU_RDAT),A ; WRITE TO HARDWARE
;
XOR A
RET
Expand Down
2 changes: 1 addition & 1 deletion Source/HBIOS/sd.asm
Original file line number Diff line number Diff line change
Expand Up @@ -294,7 +294,7 @@ SD_CS1 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
#ENDIF
SD_IOBASE .EQU SD_BASE ; IOBASE
SD_INVCS .EQU FALSE ; INVERT CS
DEVECHO "DUO"
DEVECHO "MT"
#ENDIF
;
;
Expand Down
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