[WIP] dialects (arm): add cf instructions

tests/filecheck/dialects/arm_cf/test_ops.mlir

@@ -0,0 +1,22 @@
+// RUN: XDSL_ROUNDTRIP
+// RUN: XDSL_GENERIC_ROUNDTRIP
+// RUN: xdsl-opt -t arm-asm %s | filecheck %s --check-prefix=CHECK-ASM
+
+module {
+  // CHECK: %x1 = arm.get_register : !arm.reg<x1>
+  %x1 = arm.get_register : !arm.reg<x1>
+
+  // CHECK: %x2 = arm.get_register : !arm.reg<x2>
+  %x2 = arm.get_register : !arm.reg<x2>
+
+  // CHECK: arm_func.beq %x1, %x2, ^loop {"comment" = "branch if equal"}
+  // CHECK-ASM: beq %x1, %x2, ^loop # branch if equal
+
+  arm_cf.beq %x1, %x2, ^loop {"comment" = "branch if equal"} : (!arm.reg<x1>, !arm.reg<x2>) -> ()
+
+  // Define the loop block
+  ^loop:
+    arm.label "loop"
+
+  // CHECK-GENERIC: "arm_cf.beq"(%x1, %x2, ^loop) {"comment" = "branch if equal"} : (!arm.register, !arm.register) -> ()
+}

xdsl/dialects/__init__.py

@@ -33,6 +33,11 @@ def get_arm():
 
         return ARM
 
+    def get_arm_cf():
+        from xdsl.dialects.arm_cf import ARM_CF
+
+        return ARM_CF
+
     def get_arm_func():
         from xdsl.dialects.arm_func import ARM_FUNC
 
@@ -334,6 +339,7 @@ def get_transform():
         "air": get_air,
         "arith": get_arith,
         "arm": get_arm,
+        "arm_cf": get_arm_cf,
         "arm_func": get_arm_func,
         "bufferization": get_bufferization,
         "builtin": get_builtin,

xdsl/dialects/arm/__init__.py

@@ -8,7 +8,7 @@
 from xdsl.dialects.builtin import ModuleOp
 from xdsl.ir import Dialect
 
-from .ops import ARMOperation, DSMovOp, DSSMulOp, GetRegisterOp
+from .ops import ARMOperation, DSMovOp, DSSMulOp, GetRegisterOp, LabelOp
 from .register import IntRegisterType
 
 
@@ -26,6 +26,7 @@ def print_assembly(module: ModuleOp, output: IO[str]) -> None:
         GetRegisterOp,
         DSMovOp,
         DSSMulOp,
+        LabelOp,
     ],
     [
         IntRegisterType,

xdsl/dialects/arm/assembly.py

@@ -1,10 +1,36 @@
 from typing import TypeAlias
 
 from xdsl.dialects.arm.register import ARMRegisterType
-from xdsl.dialects.builtin import StringAttr
-from xdsl.ir import SSAValue
+from xdsl.dialects.builtin import (
+    AnyIntegerAttr,
+    StringAttr,
+)
+from xdsl.ir import (
+    Data,
+    SSAValue,
+)
+from xdsl.irdl import irdl_attr_definition
+from xdsl.parser import AttrParser
+from xdsl.printer import Printer
 
-AssemblyInstructionArg: TypeAlias = SSAValue
+
+@irdl_attr_definition
+class LabelAttr(Data[str]):
+    name = "arm.label"
+
+    @classmethod
+    def parse_parameter(cls, parser: AttrParser) -> str:
+        with parser.in_angle_brackets():
+            return parser.parse_str_literal()
+
+    def print_parameter(self, printer: Printer) -> None:
+        with printer.in_angle_brackets():
+            printer.print_string_literal(self.data)
+
+
+AssemblyInstructionArg: TypeAlias = (
+    AnyIntegerAttr | LabelAttr | SSAValue | ARMRegisterType | str | int
+)
 
 
 def append_comment(line: str, comment: StringAttr | None) -> str:
@@ -17,11 +43,10 @@ def append_comment(line: str, comment: StringAttr | None) -> str:
 
 
 def assembly_arg_str(arg: AssemblyInstructionArg) -> str:
-    if isinstance(arg.type, ARMRegisterType):
-        reg = arg.type.register_name
-        return reg
+    if isinstance(arg, ARMRegisterType):
+        return arg.name
     else:
-        raise ValueError(f"Unexpected register type {arg.type}")
+        raise ValueError(f"Unexpected register type {type(arg)}")
 
 
 def assembly_line(

xdsl/dialects/arm/ops.py

@@ -4,13 +4,14 @@
 from xdsl.ir import Operation, SSAValue
 from xdsl.irdl import (
     IRDLOperation,
+    attr_def,
     irdl_op_definition,
     operand_def,
     opt_attr_def,
     result_def,
 )
 
-from .assembly import AssemblyInstructionArg, assembly_arg_str, assembly_line
+from .assembly import AssemblyInstructionArg, LabelAttr, assembly_arg_str, assembly_line
 from .register import IntRegisterType
 
 
@@ -154,3 +155,43 @@ def __init__(
 
     def assembly_line_args(self):
         return (self.d, self.s1, self.s2)
+
+
+@irdl_op_definition
+class LabelOp(ARMOperation):
+    """
+    The label operation is used to emit text labels (e.g. loop:) that are used
+    as branch, unconditional jump targets and symbol offsets.
+
+    https://developer.arm.com/documentation/dui0801/l/Symbols--Literals--Expressions--and-Operators/Labels
+    """
+
+    name = "arm.label"
+    label = attr_def(LabelAttr)
+    comment = opt_attr_def(StringAttr)
+
+    assembly_format = "attr-dict"
+
+    def __init__(
+        self,
+        label: str | LabelAttr,
+        *,
+        comment: str | StringAttr | None = None,
+    ):
+        if isinstance(label, str):
+            label = LabelAttr(label)
+        if isinstance(comment, str):
+            comment = StringAttr(comment)
+
+        super().__init__(
+            attributes={
+                "label": label,
+                "comment": comment,
+            },
+        )
+
+    def assembly_line_args(self):
+        return ()
+
+    def assembly_instruction_name(self) -> str:
+        return self.label.data

xdsl/dialects/arm_cf.py

@@ -0,0 +1,66 @@
+from xdsl.dialects import arm
+from xdsl.dialects.arm.assembly import AssemblyInstructionArg
+from xdsl.dialects.arm.ops import LabelOp
+from xdsl.dialects.arm.register import IntRegisterType
+from xdsl.dialects.builtin import StringAttr
+from xdsl.ir import Dialect, Operation, SSAValue
+from xdsl.irdl import (
+    Successor,
+    irdl_op_definition,
+    operand_def,
+    successor_def,
+    traits_def,
+)
+from xdsl.traits import IsTerminator
+
+
+@irdl_op_definition
+class BEqOp(arm.ops.ARMInstruction):
+    """
+    Branch if equal.
+    """
+
+    name = "arm_cf.beq"
+
+    s1 = operand_def(IntRegisterType)
+    s2 = operand_def(IntRegisterType)
+
+    then_block = successor_def()
+
+    assembly_format = (
+        "$s1 `,` $s2  `,` $then_block attr-dict `:` `(` type($s1) `,` type($s2) `)`"
+    )
+
+    traits = traits_def(IsTerminator())
+
+    def __init__(
+        self,
+        s1: Operation | SSAValue,
+        s2: Operation | SSAValue,
+        then_block: Successor,
+        *,
+        comment: str | StringAttr | None = None,
+    ):
+        if isinstance(comment, str):
+            comment = StringAttr(comment)
+
+        super().__init__(
+            operands=[s1, s2],
+            attributes={
+                "comment": comment,
+            },
+            successors=(then_block,),
+        )
+
+    def assembly_line_args(self) -> tuple[AssemblyInstructionArg, ...]:
+        then_label = self.then_block.first_op
+        assert isinstance(then_label, LabelOp)
+        return self.s1, self.s2, then_label.label
+
+
+ARM_CF = Dialect(
+    "arm_cf",
+    [
+        BEqOp,
+    ],
+)